HP Integrity rx8620 Server User Service Guide

I/O Subsystem
All of the I/O is integrated into the system by way of the PCI busses. The CC on each cell board
communicates with one SBA over the SBA link. The SBA link consists of both an inbound and
an outbound link with an effective bandwidth of approximately 1 GB per second. The SBA
converts the SBA link protocol into ropes. A rope is defined as a high-speed, point-to-point data
bus. The SBA can support up to 16 of these high-speed bi-directional links for a total aggregate
bandwidth of approximately 4 GB per second. The server supports a maximum of two SBAs
with the capability of supporting an additional two SBAs in an externally connected I/O cabinet
known as the HP Server Expansion Unit.
There are LBA chips on the PCI-X backplane that act as a bus bridge, supporting either one or
two ropes and capable of driving 33 MHz or 66 MHz for PCI cards. The LBAs can also drive at
66 MHz or 133 MHz for PCI-X cards.
HP Integrity rx8620 Server Block Diagram
Figure 1-4 HP Integrity rx8620 Server 16-Socket Block Diagram
Cell Board
The cell board contains the processors, main memory, and the CC ASIC that interfaces the
processors and memory to the I/O. The cell board is shown in Figure 1-5. It is the heart of the
cell board, providing a crossbar connection that enables communication with other cell boards
20 Overview