HP Integrity rx8620 Server User Service Guide

Figure 1-7 CPU Locations on Cell Board
DIMMS
The memory DIMMs used by the server are custom designed by HP and are identical to those
used in the Superdome servers. Each DIMM contains SDRAM memory components and is
qualified to run at 125 MHz. The CPU chip set does not support traditional DRAMs.
The server supports DIMMs with densities of 64, 128, 256, and 512 Mb for the SDRAM devices.
Table 1-2 shows each supported DIMM size, the resulting total server capacity, and the memory
component density. Each DIMM is connected to two buffer chips on the cell board.
Table 1-2 HP Integrity rx8620 Server DIMMs
Memory Component DensityTotal HP Integrity rx8620 Server
Capacity
DIMM Size
64 Mb16 GB256 MB
128 Mb32 GB512 MB
256 Mb64 GB1 GB
512 Mb128 GB2 GB
1024 Mb256 GB4 GB
Main Memory Performance
Latency to main memory is an important parameter in determining overall system performance.
For a server with memory busses at 125 MHz, the latency for a page hit is 8.5 cycles (68 ns), the
latency for a page closed is 11.5 cycles (92 ns), and the latency for a page miss is 14.5 cycles (116
ns).
Valid Memory Configurations
The server is capable of supporting as little as 0.5 GB of main memory using two 256 MB DIMMs
installed on one of the cell boards and as much as 128 GB by filling all 16 DIMM slots on all four
cell boards with 2 GB DIMMs.
DIMMs must be loaded in sets of two at specified locations on the cell board. Two DIMMs are
called an “echelon”, so two echelons would be equivalent to four DIMMs, three echelons would
be equivalent to six DIMMs and so on. The DIMMs must be the same size in an echelon. The
HP Integrity rx8620 Server Block Diagram 23