HP Integrity rx8620 Server User Service Guide

Figure 1-11 PCI-X Board to Cell Board Block Diagram
The server supports two internal SBAs. The SBAs generate 32 rope buses (16 per SBA). The 32
available internal rope buses are divided in the following manner:
• Two ropes are routed as single rope bundles to support the core I/O boards through LBAs
located on the core I/O backplane.
• Two ropes are routed as single rope bundles to two LBAs to support two slots for PCI and
PCI-X cards.
• Twenty eight ropes are bundled in two rope pairs to 14 LBAs to support 14 slots for PCI
and PCI-X cards.
NOTE: PCI-X slots 1-7 are dual rope slots while slot 8 is a single rope slot. A rope is defined as
a high-speed, point-to-point data bus.
The PCI-X backplane is the primary I/O interface for the server. It provides 16 64-bit, hot-plug
PCI/PCI-X slots. Fourteen of the slots have dual ropes connected to the LBA chips. The remaining
two slots have a single rope connected to each LBA chip. Each of the 16 slots is capable of 66
MHz/33 MHz PCI or 133 MHz/66 MHz PCI-X. All 16 PCI slots are keyed for 3.3 V connectors
(accepting both Universal and 3.3 V cards). The PCI-X backplane does not provide any 5 V slots
for the I/O cards.
The PCI-X backplane is physically one board but behaves like two independent partitions. SBA
0 and its associated LBAs and eight PCI-X slots form one I/O partition. SBA 1 and its associated
LBAs and eight PCI-X slots form the other I/O partition. One I/O partition can be powered down
separate from the other I/O partition.
Table 1-6 PCI-X Slot Types
Device
1
SlotI/O Partition
PCI (33 or 66 MHz) / PCI-X (66 or 133 MHz) 64-bit, 3.3 V connector, Hot-Plug Slot.8
2
0
PCI (33 or 66 MHz) / PCI-X (66 or 133 MHz) 64-bit, 3.3 V connector, Hot-Plug Slot.70
28 Overview