Installation Guide, Third Edition - HP Integrity rx8640 SEU

slots are keyed for 3.3V connectors (accepting both Universal and 3.3V cards). The PCI-X backplane
does not provide any 5V slots for the IO cards.
The external link for the SEU attaches the cell controller on cell board 2 to SBA 0 and attaches
the cell controller on cell board 3 to SBA 1 of the PCI-X board in the SEU cabinet.
The PCI-X backplane is physically one board but behaves like two independent partitions. SBA
0 and its associated LBAs and eight PCI-X slots form one IO partition. SBA 1 and its associated
LBAs and eight PCI-X slots form the other IO partition. One IO partition can be powered down
separate from the other IO partition.
Table 1-7 PCI-X Slot Types
PCI Mode SupportedSupported CardsRopesMaximum Speed
MHz
Slot
1
IO Partition
PCI or PCI-X Mode 13.3 V001668
2
0
PCI or PCI-X Mode 13.3 V002/0031337
PCI-X Mode 23.3 V or 1.5 V004/0052666
PCI-X Mode 23.3 V or 1.5 V006/0072665
PCI-X Mode 23.3 V or 1.5 V014/0152664
PCI-X Mode 23.3 V or 1.5 V012/0132663
PCI or PCI-X Mode 13.3 V010/0111332
PCI or PCI-X Mode 13.3 V008/0091331
PCI or PCI-X Mode 13.3 V001668
2
1
PCI or PCI-X Mode 13.3 V002/0031337
PCI-X Mode 23.3 V or 1.5 V004/0052666
PCI-X Mode 23.3 V or 1.5 V006/0072665
PCI-X Mode 23.3 V or 1.5 V014/0152664
PCI-X Mode 23.3 V or 1.5 V012/0132663
PCI or PCI-X Mode 13.3 V010/0111332
PCI or PCI-X Mode 13.3 V008/0091331
1 Each slot will auto select the proper speed for the card installed up to the maximum speed for the slot. Placing high
speed cards into slow speed slots will cause the card to be driven at the slow speed.
2 Slot is driven by a single rope and has a maximum speed of 66 MHz.
PCI-X/PCIe IO Backplane
The differences between the PCI-X/PCIe IO backplane and the PCI-X backplane are as follows:
• Twelve ropes are bundled in two rope pairs to 6 LBAs to support 6 slots for PCI and PCI-X
cards instead of 14. These ropes are capable of 133 MHz.
• Sixteen ropes are bundled into dual fat ropes to 8 LBAs to support 8 additional slots for
PCIe cards. These ropes are capable of 266 MHz.
The PCI-X/PCIe IO backplane is the primary IO interface for SEU systems. It provides 8 64-bit,
hot plug PCI/PCI-X slots. Six of the slots have dual ropes connected to the LBA chips and are
capable of 133 MHz. The remaining two slots have a single rope connected to each LBA chip and
are capable of 66 MHz. The PCI-X/PCIe IO backplane also provides eight 8x, hot plug PCIe slots.
All of the PCIe slots are driven by dual ropes and are all capable of 266 MHz. All 16 slots are
keyed for 3.3v connectors (accepting both Universal and 3.3v cards). The PCI-X/PCIe IO backplane
does not provide any 5v slots for the IO cards.
Detailed SEU Description 19