Architecture/Technology Overview

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Input/Output (I/O)
The Profusion chipset provides for a dedicated I/O bus to which up to four PCI bridges may
be attached. Two of the four host-to-PCI bridges (or I/O controller) support 64-bit, 66 MHz
PCI transactions, four times the maximum theoretical bandwidth of the current 32-bit,
33 MHz PCI bus. The other two bridges support 64-bit, 33 MHz PCI slots. I/O throughput is
improved since the PCI controllers are now connected to the I/O bus rather than the
processor bus as in prior generations.
As can be seen from Figure 2, the I/O bus handles all of the I/O traffic, reducing the impact
upon the processor buses and upon the processors’ interfacing with memory. Since there
is no contention between the I/O and processor activity, this new architecture allows for
greater throughput and improved scalability. 66 MHz, 64-bit PCI enables the use of the
latest high performance I/O adapters for networking and storage.
Processor Cache Coherency Filter
The processor cache coherency filter is memory that is used to keep track of data that each
processor bus has cached. The processor cache coherency filters (2) are used in
conjunction with the I/O coherency filter memory (stored within the Profusion chipset) to
store information about data that has been cached on either of the two P6 processor
buses. When a processor on one bus makes a request for data, the Profusion chipset looks
at the information stored in the coherency filter for the other bus, to determine if the
required data is cached there. If it sees that the data is not cached there, it can go directly
to memory, reducing search time and system overhead, thereby improving system
performance.
System Management Features
Industry initiatives supported by HP and Intel also promote a balanced platform that
improves overall system performance and lowers the total cost of ownership for the
enterprise-class server.
• Intelligent Platform Management Interface or IPMI: IPMI defines an industry
standard, co-developed by HP and Intel, which provides a common framework that
specifies how system devices communicate in a standard way. The devices are
monitored and coordinated through a management controller, which reduces load on
the CPU, improving performance. The management controller also logs all system
events to embedded, non-volatile memory. The log also aids recovery, should a device
fail, since it provides a detailed record of the event. The HP NetServer LXr 8500 is
IPMI-compliant.
• Virtual Interface Architecture or VIA: An industry-standard architecture enabling the
clustering of standard high volume Intel-based servers. VIA results in highly scalable,
enterprise-class platforms optimized for data warehousing, decision support and
transaction processing applications. VIA standards have been incorporated into the
design of the HP NetServer LXr 8500.