Accelerator Manual (G06.24+, H06.03+)

Glossary
Accelerator Manual—527303-002
Glossary-5
TNS instructions.
NonStop EXT, NonStop VLX, NonStop Cyclone, NonStop CLX 600, CLX 700, and CLX
800, and NonStop CLX/R 1100 systems. Contrast with “HP NonStop Series/RISC
(TNS/R).”
TNS instructions. Stack-oriented, 16-bit machine instructions defined as part of the TNS
environment. On TNS systems, TNS instructions are implemented by microcode; on
TNS/R systems, TNS instructions are implemented by millicode routines or by
translation to an equivalent sequence of RISC instructions. Contrast with “RISC
instructions.”
TNS mode. The operational environment in which TNS instructions execute.
TNS object code. The TNS instructions that result from processing program source code
with a TNS language compiler. TNS object code executes on both TNS and TNS/R
systems.
TNS object file. The object file created by a TNS compiler. The file contains TNS
instructions and other information needed to construct the code spaces and the initial
data for a TNS process.
TNS word. An instruction-set-defined unit of memory. A TNS word is 2 bytes (16 bits) wide,
beginning on any 2-byte boundary in memory. See “RISC word” and “word.”
TNS/R. HP computers that support the HP NonStop operating system and that are based
on reduced instruction-set computing (RISC) technology. TNS/R processors implement
the RISC instruction set and are upwardly compatible with the TNS system-level
architecture. TNS/R processors include the NSR-L and NSR-N processors. Systems
with these processors include the NonStop K1000, NonStop K10000, NonStop
Cyclone/R, and NonStop CLX/R 1200 systems. Contrast with “Tandem NonStop Series
(TNS).”
TNS/R native mode. The operational environment in which unaccelerated native-compiled
RISC instructions execute.
trap. A software interrupt that provides a way of handling certain events, such as detection
of a hardware (or software) fault, a timer expiration, or a lack of system resources. A
trap is often an indication of a run-time event that requires immediate attention; most
such events preclude continuing the interrupted instruction stream. Traps are
generated for TNS Guardian processes. (TNS/R native Guardian processes and all
OSS processes receive signals instead.) An Instruction Failure trap indicates that an
instruction could not executed because the instruction or its data were invalid.
Compare to signal.
word. An instruction-set-defined unit of memory that corresponds to the width of registers
and to the most common and efficient size of memory operations. A TNS word is 2
bytes (16 bits) wide, beginning on any 2-byte boundary in memory. A RISC word is 4
bytes (32 bits) wide, beginning on any 4-byte boundary in memory.