Accelerator Manual (G06.27+, H06.04+, J06.03+)

Preparing Your Program for TNS/R Systems
Accelerator Manual—527303-003
2-13
Data Alignment in TNS and Accelerated Code
Detection Guidelines
•
Use a text editor to search for ALS 0, LLS 0, ARS 0, and LRS 0 in TAL CODE
statements. Make sure that the operands for these instructions do not use shift
counts greater than 31.
•
Use a text editor to search for the TAL bit-shift operators: unsigned left and right
shift ('<<' and '>>') and signed left and right shift (<< and >>). Make sure that in
cases where the left operand is a 16-bit unit and the shift count is dynamic, the
count is never greater than 31.
Required Change
•
Recode statements that use dynamic shift counts greater than 31.
Example
In this example, the value of p is arithmetically shifted to the right 35 positions. The
value of p differs on TNS and TNS/R systems.
INT p, nbits, q; ! INT variables
p := -128;
nbits := 35; ! Shift value of 35-bits
q := p >> nbits; ! On TNS systems,
! same as p >> 16, q = -1
! On TNS/R systems,
! same as p >> (35-32), q = -16
Data Alignment in TNS and Accelerated Code
This section describes the data alignment requirements for TNS code and the
Accelerator. It also describes how to use the Misalignment Tracing Facility diagnostic
tool added in the G06.17 RVU.
On TNS systems, a word is 16 bits. The TNS instruction set includes data access
instructions that use 32-bit byte addresses that must be even-byte aligned (that is,
aligned 0 modulo 2) for correct operation. This requirement remains even after the
Accelerator translates TNS code into RISC code. In TNS mode and accelerated mode,
addresses that are odd-byte aligned (that is, aligned 1 modulo 2) are called misaligned.
TNS processors consistently “round down” misaligned addresses (that is, they ignore
the low-order bit).
TNS/R processors handle the misaligned addresses of TNS programs inconsistently,
rounding down some but not others and behaving differently in TNS mode and
accelerated mode. These problems do not occur in programs that follow all of the
programming rules for TNS languages, but compilers cannot catch misaligned
addresses that are computed at run time.