AM3270/TR3271 Reference Manual
TR3271-Specific Operations
A Closer Look at TR3271
086705 Tandem Computers Incorporated 5–9
The following is an example that illustrates how the Reset MDT is handled by a
327x control unit and TR3271. In the examples, assume that a two-block message
is sent. Block #1 has a Reset MDT bit set to 0, and block #2 has its Reset MDT bit
set to 1. Also, block #1 contains fields where the MDT bit in the field attribute has
been set by the host.
The host is communicating directly to a 327x control unit:
Block #1 is received and written out to the buffer of the selected device.
Block #2 is received. Because the Reset MDT bit in the WCC is set to 1, all
MDT tags in the buffer, including MDT tags in block #1 are reset.
Block #2 is written out to the buffer of the selected device. MDT tags in block
#2 are not affected.
The host is communicating with TR3271, which is in pass-through mode to
AM3270:
Block #1 is received by TR3271.
Block #2 is received by TR3271 and combined with block #1 to form the
message. The message has the Reset MDT bit in the WCC set to 1 (as a result
of the OR operation).
The actual message (consisting of block #1 and #2) is written to the terminal.
MDT tags contained in block #1 and block #2 are not affected.
Because the message has its MDT bit set, any MDT bits on the terminal are
reset.
The example illustrates that the MDT tags in block #1 were not changed in the
TR3271 case, while they were changed in the direct connect case.
User Considerations
The system generation modifier “RSIZE” must be defined large enough to
accommodate the entire message.
Existing TR3271 application programs may have to be modified to receive larger
messages because MULTIBLOCK combines several blocks into one message to be
sent to the application.
Obsolete Caveats
In case you were wondering what happened to additional caveats that appeared in the
previous version of this manual (Device-Specific Access Methods—AM3270/TR3271),
they have been deleted because they no longer apply, as of the C30.09 and D10
releases.