ATM Configuration and Management Manual
Glossary
ATM Configuration and Management Manual—522307-003
Glossary-16
position-independent code (PIC)
position-independent code (PIC). Executable program or library code that is designed to 
be loaded and executed at any virtual memory address, without any modification. 
Addresses that can be modified by the loader do not appear in PIC code, only in data 
that can be modified by the loader. See also dynamic-link library (DLL).
preset. A linker operation that sets the correct values (addresses) of imported symbols 
according to the environment seen by the linker. If the loader encounters the same 
environment at load time, it avoids adjusting these values, which reduces loading 
overhead. 
(See 
fastLoad). If not, the loader resets these values to match the load-time 
environment.
primary processor. The processor that is designated as 
owning
 the ServerNet addressable 
controller (SAC) connected to separate processors running the NonStop Kernel 
operating system. The primary processor is the processor that has direct control over 
the SAC. Contrast with backup processor.
private dynamic-link library (private DLL). See ordinary dynamic-link library (ordinary 
DLL).
processor. (1) A functional unit of a computer that reads program instructions, moves data 
between processor memory and the input/output controllers, and performs arithmetic 
operations. A processor is sometimes referred to as a central processing unit (CPU), 
but NonStop servers have multiple cooperating processors rather than a single CPU. 
(2) One or more computer chips, typically mounted on a logic board, that are designed 
to perform data processing or to manage a particular aspect of computer operations.
processor multifunction (PMF) CRU. (1) A NonStop S-series customer-replaceable unit 
(CRU) that contains a power supply, service processor (SP), ServerNet router 1, 
Ethernet controller, three ServerNet addressable controllers (SACs), and a processor 
and memory system in a single unit. The PMF CRU consists of three subassemblies: 
the processor and memory board (PMB), the multifunction I/O board (MFIOB), and the 
power supply subassembly. (2) A collective term for both PMF CRUs and PMF 2 CRUs 
when a distinction between the two types of CRUs is not required.
program. See program file.
program file. An executable object code file containing a program’s main routine plus 
related routines statically linked together and combined into the same object file. Other 
routines shared with other programs might be located in separately loaded libraries. A 
program file can be named on a RUN command; other code files cannot. See also 
object code file.
programmable read-only memory (PROM). Data storage chips that are read-only but can 
be reprogrammed by a special device or by software.
PROM. See programmable read-only memory (PROM). 
protocol. A set of rules used by processes or devices for exchanging data.










