CP6100 I/O Process Programming Manual
 Contents
 Balancing the Communication Workload................. 3-24
 Revising Line Parameters to Improve Performance...... 3-32
 Problem Determination.................................. 3-38
 APPENDIX A: FILE SYSTEM ERROR CODES..................... A-1
 APPENDIX B: CPTEST...................................... B-1
 Input Line Format...................................... B-2
 Numbers................................................ B-5
 Operators.............................................. B-6
 CPTEST RUN Command..................................... B-7
 CPTEST Commands........................................ B-9
 CPTEST Error Messages.................................. B-29
 INDEX.................................................... Index-1
 FIGURES
 1-1 The CP6100 Environment............................. 1-3
 1-2 Application Design Strategies...................... 1-5
 1-3 First Generation Controller Fault-Tolerance........ 1-7
 1-4a 6100 Subsystem Fault-Tolerance (Dual-Port
 Controllers)..................................... 1-9
 1-4b 6100 Subsystem Fault-Tolerance (Single-Port
 Controllers)..................................... 1-10
 2-1 Interaction between Application, I/O Process, and
 Protocol Task...................................... 2-3
 2-2 WRITEREAD Buffer................................... 2-6
 2-3a 6100 Subsystem (Dual-Port Controllers)............. 2-9
 2-3b 6100 Subsystem (Single-Port Controllers)........... 2-10
 2-4 File System Errors................................. 2-14
 3-1a Sample Entries from SYSGEN Configuration File
 (Dual-Port Controllers).......................... 3-4
 3-1b Sample Entries from SYSGEN Configuration File
 (Single-Port Controllers)........................ 3-6
 3-2 Effect of ALTER LINE <ldev>, CONFIG................ 3-15
 3-3 Excerpt from STATUS LINE, DETAIL................... 3-19
 3-4 CPU Switch......................................... 3-26
 3-5a Controller Switch. Controllers Owned by
 the Same CPU....................................... 3-27
 3-5b Controller Switch. Controllers Owned by
 Different CPUs..................................... 3-28
 3-6a Controller and CPU Switch. Controllers Owned by
 Different CPUs..................................... 3-30
 3-6b Controller and CPU Switch. Controllers Owned by
 the Same CPU....................................... 3-31
 October 1985
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