Debug Manual

Using Debug on TNS/R Processors
Debug Manual—421921-003
2-5
Types of Processes
Portions executed in TNS execution mode result both from explicit instructions to
the Accelerator not to optimize portions of code and from TNS instructions that the
Accelerator cannot optimize.
Portions executed in accelerated execution mode consist of statements and
procedures that were optimized by the Accelerator.
Types of Processes
A process that is initiated by executing a native program is called a TNS/R native
process. A native process executes in the native operating environment of the TNS/R
processor.
A process that is initiated by executing a TNS or accelerated program is called a TNS
process. A TNS process executes in an emulated TNS operating environment.
TNS and RISC Execution Correspondence
(Accelerated Mode)
In accelerated program files, there are two types of execution points where you can
depend on exact correspondence between TNS and RISC states. These are:
•
Memory-exact point: A point in an accelerated program where memory (but not
necessarily the registers) is in a known state and contains exactly the values it
would if the program had been running on a TNS processor. The memory,
however, might have already been loaded in registers, so setting breakpoints to
modify memory at these points might not achieve the desired results.
Most statement boundaries are memory-exact points, and complex statements
might contain several such points: at each function call, privileged instruction, and
embedded assignment.
•
Register-exact point: A point in an accelerated program where both memory and
registers are in a known state that is equivalent to the state the program would be
in if it had been running on a TNS processor.
In accelerated execution mode, register-exact points occur at procedure calls and
returns, and on entering and leaving accelerated execution mode.
The Debug PMAP command displays corresponding TNS and RISC code and marks
memory-exact (>) and register-exact (@) points in the display.
The Debug D* command displays corresponding TNS and TNS/R register values.
Breakpoints
In accelerated program files, there are typically multiple RISC instructions per TNS
instruction; therefore, any mapping from a breakpoint at a RISC instruction to a TNS