Debug Manual

Using Debug on TNS/R Processors
Debug Manual—421921-003
2-8
Considerations for Memory-Access Breakpoints
•
Setting a RISC breakpoint at any valid RISC address is allowed; however, only at
register-exact points are both TNS/R memory and registers consistent with the
TNS state.
•
Setting a RISC breakpoint does not cause a TNS breakpoint even if there happens
to be a corresponding TNS instruction. If you set a RISC breakpoint, it is assumed
that you want to debug in the RISC state.
•
Avoid modifying memory at memory-exact points; instead, you should modify
memory only at register-exact points when debugging in accelerated execution
mode.
•
Modify register values only at register-exact points when debugging in accelerated
execution mode.
Considerations for Memory-Access Breakpoints
Execution of additional instructions might affect the value of the memory location at the
breakpoint and the value of the P-register.
The TNS P or the TNS/R $PC register contains the address of the next instruction to
be executed. Conventionally, the contents of the P-register are incremented by one at
the beginning of instruction execution so that, nominally, instructions are fetched (and
executed) from ascending memory locations. Typically, the value of the P or $PC
register that can be displayed at the breakpoint is one greater than the instruction that
caused the breakpoint.
In Accelerated Execution Mode
In accelerated code, several more TNS instructions can be executed between the
instruction that causes the breakpoint and the instruction where the breakpoint occurs.
When debugging accelerated code, consider this:
•
Read-access memory-access breakpoints do not occur if the Accelerator has
optimized the read from memory. This occurs when the Accelerator keeps the
value in a register.
Differences Between Code and Memory-Access Breakpoints
When a code breakpoint is on an instruction that causes a memory-access breakpoint,
the code breakpoint is reported first, then memory access-breakpoint is reported after
resuming the program. The following examples show the results when there is only a
memory-access breakpoint set and the results when a code breakpoint is placed on an
instruction that produces a memory-access breakpoint.