GPA Manual

Description of GPA Reports
Guardian Performance Analyzer (GPA) Manual—135081
3-10
Processor Load Balance and Performance Charts
Processor Performance Chart
This chart (Example 3-6) gives the following physical and performance data for each
processor on the node analyzed:
The Processor Performance Chart also provides the following summary data for the
entire node:
(1) CPU NUM: The processor’s identification number.
(2) CPU TYPE: The processor’s type designation. All of the processors in the
example are TXPs.
(3) MB MEMORY: The processor’s total memory in megabytes. Each processor
on this node has 8 megabytes of memory.
(4) PCT BUSY: Percentage of time the processor is busy. These figures are the
basis for the levels indicated on the Processor Load Balance Chart.
(5) DISK PRIME: The number of volumes for which the processor is the
primary CPU.
(6) DISK RATE: Number of disk I/O operations per second performed on the
CPU. Notice that the chart shows no disk I/Os for CPUs 1 and 3, since no
volumes are primaried on these processors (see Item 5 above).
(7) CHIT RATE: Number of cache hits per second. Here again, CPUs 1 and 3,
with no volumes primaried, show no cache hits.
(8) MSG RATE: Number of messages per second sent or received by the
processes on the CPU.
(9) DISP RATE: Number of dispatches per second occurring on the processor.
(10) SWAP RATE: Number of page swaps per second taking place on the
processor. Notice in the example that CPUs 0 and 1 with their high swap rates
are contributing to the excessive swap rate for the node (refer to Example 3-1
).
(11) MMGR PAGES: Number of 2048-byte pages in memory owned by the
memory manager. A portion of this is used to calculate cache.
(12) PCB COUNT: Number of processes active on the CPU during the
measurement period analyzed by GPA.
(13) TRANSIENTS: Number of processes on the CPU that were started and
stopped during the measurement period analyzed by GPA.
(14) HALT IMPACT: How system performance would be affected if the processor
failed. Notice in the example that the failure of CPU 0 would result in a
significant shortage of available memory on the other processors.