Guardian Programmer's Guide

Glossary
Guardian Programmer’s Guide — 421922-014
Glossary - 17
memory manager
as they would be if the object file were running in TNS interpreted mode or on a TNS
system. Most source statement boundaries are memory-exact points. Complex
statements might contain several such points: at each function call, privileged
instruction, and embedded assignment. Contrast with register-exact point and
nonexact point.
memory manager. An HP NonStop™ operating system process that implements the paging
scheme for virtual memory. This process services requests generated by different
interrupt handlers as well as by other system processes.
memory page. A unit of virtual storage. In TNS systems, a memory page contains 2048
bytes. In TNS/R systems, the page size is determined by the memory manager and
can vary, depending on the CPU type.
memory pool. An area of an extended data segment or user data segment that your
program allocates and from which your program can obtain and release blocks of
storage.
message system. A set of operating system procedures and data structures that handles
the mechanics of exchanging messages between processes.
message tag. A value assigned to a message by the file system when you read the
message from $RECEIVE. You can use this tag to identify the reply when processing
multiple messages at the same time.
MIPS Computer Systems, Incorporated. RISC CPU manufacturer.
MIPS region of a TNS object file. The region of a TNS object file that contains MIPS
instructions and the tables necessary to execute the instructions in accelerator mode
on a TNS/R system. Accelerator creates this region and writes it into the TNS object
file. Contrast with Intel® Itanium® instruction region.
MIPS RISC instructions. Register-oriented 32-bit machine instructions in the MIPS-1 RISC
instruction set that are native to and directly executed on TNS/R systems. MIPS RISC
instructions do not execute on TNS systems and TNS/E systems. Contrast with TNS
instructions and Intel® Itanium® instructions.
Accelerator-generated MIPS RISC instructions are produced by accelerating TNS
object code. Native-compiled MIPS RISC instructions are produced by compiling
source code with a TNS/R native compiler.
MIPS RISC word. An instruction-set-defined unit of memory. A MIPS RISC word is 4 bytes
(32 bits) wide, beginning on any 4-byte boundary in memory. Contrast with TNS word
and
word. See also Intel® Itanium® word.
millicode. RISC instructions that implement various TNS low-level functions such as
exce
ption handling, real-time translation routines, and library routines that implement
the TNS instruction set. Millicode is functionally equivalent to TNS microcode.