Inspect Manual
Using Inspect on a TNS/R System
Inspect Manual—429164-006
15-9
Optimizations With Branches
The position following a load instruction is referred to as a load delay slot. Dummy
instructions or NOP instructions can always be placed in delay slots. As part of its
optimization process, the compiler attempts to place useful instructions in load delay
slots. The only requirement is that the instruction cannot depend on the data being
loaded. Filling delay slots with useful instructions changes the order of instructions but
yields improved program performance. Reordering of instructions usually has little
effect on source-level debugging, but it may affect machine-level debugging.
Optimizations With Branches
Branch instructions control the path of instructions executed by a program. On TNS/R
processors, branch instructions require an extra machine cycle to complete. The
position following a branch instruction is referred to as a branch delay slot; it contains
an instruction that will be executed before the branch occurs.
One of the optimizations performed by the accelerator is the filling of such branch
delay slots with useful instructions; otherwise, delay slots are filled with NOP
instructions. Filling delay slots often results in the instruction sequence being
reordered, yielding improved program performance. Branch optimizations can result in
statements being merged, thereby reducing the number of breakpoint locations.
Another optimization performed involves branch instructions is the elimination of
“branch chains.” In instances where a branch instruction branches to another branch
instruction, a single branch instruction may be generated that branches to the target of
the second instruction.
Example
This example illustrates how the accelerator fills load and branch delay slots with
useful instructions.
This example sows the TNS and TNS/R instructions for the preceding source code:
The accelerator has placed the LI instruction in the delay slot of the LH instruction and
the SH instruction in the delay slot of the BNE instruction. This results in the following
operations being performed:
1. Load the value of j
2. Load the value 4
3. Branch if j <> 4
#22 i := j;
#23 IF j = 4 THEN
#22
%000006: > LOAD L+006 %h70420030: > LH t5,12(fp)
%000007: STOR L+005 %h70420034: LI at,4
%000010: LOAD L+006 %h70420038: BNE t5,at,0x70420088
%000011: CMPI +004 %h7042003C: SH t5,10(fp)
%000012: BNEQ +010