Inspect Manual

Using Inspect on a TNS/R System
Inspect Manual—429164-006
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TNS Instruction Side Effects
4. Store the value of j in i
TNS Instruction Side Effects
Many TNS instructions update the machine state, such as registers R0-R7 and status
flags in the TNS environment register, the most common being the condition code
flags. The effects that instructions have on environment register flags are often
referred to as instruction side effects.
The TNS/R processor does not have the same registers as the TNS processor.
Therefore, when the accelerator translates a program, it must generate code that
updates the TNS execution model to reflect instruction side effects used by the
program. Since programs often do not make use of instruction side effects, the
accelerator does not generate code for side effects that are not used.
This has little impact on source-level debugging. When debugging at the TNS
machine level, it could result in the displayed TNS registers having different values
than they would on a TNS machine. For example, the condition code flags are only
valid if they are used by the program.
Debugging Programs at the TNS/R Machine
Level
Inspect provides some functionality for examining the TNS/R machine state when
debugging either TNS/R native or accelerated programs. This includes the ability to
display and modify TNS/R machine registers and to display TNS/R instructions. A
complete set of TNS/R machine-level debugging functionalities, including the ability to
set breakpoints on TNS/R instructions, is available by invoking Debug from within
Inspect.
What You Need to Know
To debug at the TNS/R machine level, you must have knowledge of the TNS/R
architecture, including the instruction set, registers usage, addressing, transitions from
TNS/R to TNS code, and variances between TNS and TNS/R systems.

For more information about TNS/R instruction set, see MIPS RISC Architecture, by
Gerry Kane, Prentice Hall: 1989.

For more information about the accelerator, transitions into TNS code and
variances between TNS and TNS/R systems, see the Accelerator Manual.

For more information about register usage and addressing, see the NonStop S-
Series Server Description Manual.

For more information about Debug, see the Debug Manual.
Note. Debugging at the TNS/R machine level is rarely necessary