NonStop S-Series Server Description Manual (G06.24+)

HP NonStop S-Series Server Description Manual—520331-003
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Memory Addressing and Access
This section describes how memory is addressed and accessed within the processors
of the NonStop S-series servers.
The first fifteen topics in this section cover the addressing principles. The remaining
topics cover the access logic.
The Process Address Space
Organization of the Process Address Space
Addressing in the Process Address Space
Address Formats
Selectable and Flat Logical Segments
First Four Relative Segments
Main Stack and SRL Data
Last Eight Regions
Native Process Code Allocations
TNS Process Code Allocations
Allocation for TNS and Accelerated Code
Chart of Nonprivileged Space Allocation
Physical Memory Addressing
Kseg0 Usage
Kseg2 Usage
Kseg1 Memory Access
Kseg0 Memory Access
Kseg2 and Nonprivileged Space Memory Access
The TLBPID Process Identifier
Nonglobal Address Translation
Address Translation of Global Elements
Address-Mapping Tables
Access of Special Pages
Defining Unallocated Space
Context-Bound Addresses
Note. Some very low-level detail is presented in this section. Be aware that specific address
allocations, table formats, and many architectural details have changed in the past and will
change in the future. Application software should never directly use or depend on the details
presented in this section. Applications that require memory management must always use the
appropriate callable procedures. Such procedures accommodate the differences in low-level
operations.