NonStop S-Series Server Description Manual (G06.24+)
Memory Addressing and Access
HP NonStop S-Series Server Description Manual—520331-003
4-46
Access of Special Pages
Access of Special Pages
Some special processor features need to be implemented as reserved virtual memory 
spaces. Three specific features are described in this topic: (1) a memory-resident 
TNS register stack, located in a page called the RP wrap page, (2) a range of nil 
addresses, and (3) a scratchpad for millicode use, called the SPAD pages.
The simulated register stack is allocated in the last unitary segment of the 
nonprivileged space. As shown in Figure 4-22, the memory-resident TNS register 
stack (described in Section 6, TNS Execution Modes) is located in a single page called 
the RP (for register pointer) wrap page. This page is the second page (page 1) of a 
segment called the RP wrap segment. The hexadecimal address of the page is 
7FFE4000. Other pages of the segment are all unused.
The RP wrap page is permanently resident in physical memory. Although it is located 
in nonprivileged space, it is accessed only by TNS interpreter millicode, and callable 
procedures reject attempts to use RP wrap locations as reference parameters.
As for nil addresses, these are needed by the operating system to guarantee that 
specific ranges of addresses result in memory address error traps; thus there will never 
be virtual memory allocated at these addresses. These ranges are specified as –256 
KB through –128 KB –1, and –2 KB through –1. These ranges fall at the end of Kseg2 
and represent the last two kilobytes of absolute segment 16381, all of absolute 
segment 16382, and the last two kilobytes of absolute segment 16383. The operating 
system never allocates virtual memory in any of these three segments.
The SPAD (scratchpad) is a group of four pages allocated in absolute segment 16383, 
specifically pages 24 through 27 in the full range of 0 through 31. These pages 
actually do get translated to physical memory, and they allow privileged millicode to 
access memory variables quickly and without disturbing the contents of the general 
registers.
The scratchpad pages contain many privileged-only data items that need to be 
accessed by millicode. Those related to memory management include the TLBPID 
owner array, pointers to the PDST and SEG tables, and a pointer to the current 
process data space table (CPDST). The SPAD pages are allocated, locked, and 
initialized by SYSGEN, and their address translations are permanently loaded into 
reserved locations of the translation lookaside buffer (TLB).










