NonStop S-Series Server Description Manual (G06.24+)

TNS Execution Modes

HP NonStop S-Series Server Description Manual—520331-003

6-18

Indexed Addressing in a Code Segment

In addition to direct and indirect addressing, an offset value in one of three index

registers can be added to the address of the direct or indirect location before the final

address is calculated. This permits a code segment location to be referenced as an

offset from a base location; this is called indexing.

Indexing in a code segment is not used for branching but rather for accessing read-

only arrays compiled into the code segment. Figure 6-11 is an example that illustrates

the action of an LWP (Load Word from Program) instruction. It shows a combination of

indirect and indexed addressing.

At the start of this example, the current P register value is 3729. The displacement

value in the instruction is 8. Adding these together produces a direct reference

address of 3737. Because indirect addressing has been specified (note the 1 in the

most significant bit of the instruction), the content of location C[3737] is taken as a new,

self-relative displacement value. That value is negative in this case (–304), so the

addition of this value to its own address (3737) produces a new address of 3433. This

is a lower address than the current P register setting, and it indicates the start of the

array (element 0).

To select one element of the array, the content of an index register is needed. In this

case, the instruction coding specifies the value 2 in its index register field. This means

that the second of the three index registers contains the index value. As described

earlier, the last three registers of the register stack (R[5], R[6], and R[7]) double as

index registers. Thus the second of these three is R[6], and the content of that register

is taken as the index value.

In this case the index value is 6, so 6 is added to the base address of the array (3433)

to finally address location C[3439], the address that contains the desired element of

the array. The content of this location is the information that the LWP instruction loads

into one of the other locations of the register stack (whichever register is becoming the

top of the stack).

Addressing of byte elements (with indexing) is also permitted in the code segment,

though restricted to only half of the segment. The reason for this restriction is that one

bit of the address is used as a byte specifier, thus cutting the address range by half.

For the direct, indexed case, the half segment is the same half in which the current P

containing the indirect cell. Byte addressing in the code segment is accomplished by

the LBP (Load Byte from Program) instruction.