NonStop S-Series Server Description Manual (G06.24+)

TNS Execution Modes
HP NonStop S-Series Server Description Manual—520331-003
6-20
Direct and Indirect Addressing in the Data Segment
Direct and Indirect Addressing in the Data
Segment
A TNS process has only one segment for its global data, called the user data
segment. It contains the process’s global variables and data stack.
Various addressing modes are provided for addressing locations relative to the current
stack frame; however, those modes will be covered in later topics, when procedure
calls are described. For now, assume there is only one mode, the simplest one—the
G-relative mode. This is the “global” mode, in which all addresses are relative to G[0],
the starting address of the segment.
In any instruction that refers to the data segment, there is a mode specifier and a
displacement field, occupying bits 7 through 15 of the instruction word. This is shown
in Figure 6-12. In this case, a 0 in bit 7 specifies the G-relative addressing mode, and
bits 8 through 15 specify the displacement from G[0]. That field size limits the
displacement range to 256 words; that is, G[0] through G[255].
If the indirection bit (bit 0) of the memory reference instruction is equal to 0, then direct
addressing is specified. With direct addressing, the address of an operand referenced
by an instruction is directly specified in the address field of the memory reference
instruction. Only one memory (or data cache) reference is needed to access the
referenced memory location. If, in the example shown, the indirection bit were 0,
location G[11] would be the referenced location.
However, if the indirection bit of the memory reference instruction is equal to 1, then
indirect addressing is specified. With indirect addressing, the address of the
referenced location, relative to G[0], is contained in a location that can be addressed
directly. The contents of the direct location are used as an address pointer. (This
differs from the case of indirect addressing in a code segment, where the direct
location contains a self-relative offset, not an address pointer.)
In the example shown, the direct location is G[11]. That location contains the value
1037, so G[1037] is the location accessed by the instruction.
Two memory references are needed to access the referenced location: the first to fetch
the address and the second to access the operand. Because the address pointer is
16 bits (rather than just 8 as in the displacement field of the instruction), the range of
indirect addressing is G[0:65535]. That means that indirect addressing can access any
location in the data segment.
If the instruction applies to a doubleword operand, the operand consists of two words
starting at the referenced location—whether arrived at directly or indirectly. Using
ordinary memory reference instructions, quadruplewords cannot be accessed as such
in the data segment. A quadrupleword must be accessed as some combination of
smaller units, such as two doublewords or four words. (However, stack-operand
instructions, such as QLD and QST, can load and store entire quadruplewords.)