NonStop S-Series Server Description Manual (G06.24+)
Native Execution Mode
HP NonStop S-Series Server Description Manual—520331-003
7-6
Procedure Name Spaces for the System Library
Procedure Name Spaces for the System
Library
The system library exists in two separate name spaces, SL and SLr. That is, a name
can appear once in each space. The SL name space contains all the TNS library
procedures, and the SLr name space contains all the native RISC library procedures.
Most system library procedures are executed as native library procedures in the SLr
name space. Native processes can call these procedures by name and invoke them
directly. TNS processes, however, cannot invoke these procedures directly, because a
transition to native mode is necessary.
So that TNS processes are able to call a target library procedure transparently, using
the same name that it would if it were a native process, these two name spaces are
bridged by a combination of a shell map and special procedures called to-RISC
shells. Refer to Figure 7-3.
When a TNS or accelerated procedure needs to make a call to a RISC library
procedure, it does so by its native name. If an accelerated TNS version of the library
procedure exists in the SL name space, the address refers the call to that procedure.
This happens in cases where semantics, formal-procedure parameters, or code brevity
make it mandatory or more efficient not to switch to the SLr name space and native
mode, or when a native version of the target procedure does not exist. For example,
there is no native version of the LASTADDRX procedure.
In most cases, however, the required system library procedure is TNS/R native code,
which must execute in native mode. Each native procedure that can be called from
TNS or accelerated code has an associated to-RISC shell, which is entered as though
it were accelerated code but effects the transition to native mode and back.
For calls from TNS code to system library, the interpreter millicode utilizes the shell
map to locate the RISC code for the target procedure. This mapping is possible
because all the code in SC and SL is accelerated, and all the to-RISC shells start
execution in accelerated mode. The shell map is a table located in user space at
address 7FFC0000; it is indexed by the low-order 15 bits of any XEP entry whose high-
order bit (CS) is 1 (see next topic). The designated map entry holds the starting
address of the target procedure; if the procedure is CALLABLE that address
designates its gateway in the 7E region.
In an accelerated procedure, the RISC translation of the XCAL instruction does not use
the shell map (although DPCL does). The accelerated code jumps directly to the
target procedure (or its gateway); the target may be either accelerated code or a to-
RISC shell.
The to-RISC shell invokes millicode to accomplish the transition to native mode,
including switching from the TNS stack to the main (RISC) stack. The shell also
translates parameters as needed for the particular calling sequence. It then transfers
control to the target native library procedure. Upon return, the RISC shell translates