NonStop S-Series Server Description Manual (G06.24+)

TNS Instruction Set
HP NonStop S-Series Server Description Manual—520331-003
11-31
Definitions of TNS Instructions
so indicated is assumed to be the first word of a two-word even-byte extended memory
pointer. The index value in A is sign-extended, then shifted left one bit position
(multiplication by 2, because this instruction requires word addressing rather than byte
addressing) and then added to the extended memory pointer to address the word that
is to be loaded. Condition Code is set. For binary coding details, refer to Table B-3 on
page B-3.
MBXR (000420). Move Bytes Extended, Reverse. This instruction transfers a
specified number of bytes from one area of extended memory to another, using
reverse (decrementing) addresses. The instruction expects A to contain a byte count,
CB to contain a 32-bit source byte address, and ED to contain a 32-bit destination byte
address. The move is made one byte at a time from the source to the destination.
After each byte transfer, the addresses are decremented and A is decremented. If A is
equal to zero, the instruction ends; otherwise the next byte is moved. All five words
are deleted from the stack when the instruction ends.
MBXX (000421). Move Bytes Extended, and Checksum. This instruction transfers a
specified number of bytes from one area of extended memory to another and
computes a checksum value (byte exclusive “or”) after each byte is moved. The
instruction expects A to contain a byte count, CB to contain a 32-bit source byte
address, ED to contain a 32-bit destination byte address, and F to contain the initial
checksum value. The move is made one byte at a time from the source to the
destination. After each byte transfer, the addresses are incremented, A is
decremented, and the new checksum is entered in F. If A is equal to zero, the
instruction ends; otherwise the next byte is moved. Five words are deleted from the
register stack when the instruction ends, leaving the final checksum value in A.
MNDX (000227). Move Words While Not Duplicate, Extended. FE is assumed to
contain a 32-bit even-byte destination address, and DC is assumed to contain a 32-bit
even-byte source address. The MNDX instruction moves words from the source to the
destination while the count value in register B is not zero and the source word is not
equal to the word in A. The word in A is always the previous word moved. The
instruction stops on the first duplicate word or on zero count. After execution, the word
in A is deleted, so that A then contains the count, CB contains the source address, and
ED contains the destination address.
MNGG (000226). Move Words While Not Duplicate. Register D is assumed to contain
a destination address in the current data segment, and register C is assumed to
contain a source address in the current data segment. The MNGG instruction moves
words from the source to the destination while the count value in register B is not zero
and the source word is not equal to the word in A. The word in A is always the
previous word moved. The instruction stops on the first duplicate word or on zero
count. After execution, the word in A is deleted, so that A then contains the count,
B contains the source address, and C contains the destination address.
MOND (000001). Minus One Double. A doubleword negative one is pushed onto the
top of the register stack (BA). Condition Code is set.
MOVB (126---). Move Bytes. This instruction transfers a specified number of bytes
from one area of memory to another. The instruction expects A to contain a byte