NonStop S-Series Server Description Manual (G06.24+)

TNS Instruction Binary Coding
HP NonStop S-Series Server Description Manual—520331-003
B-2
I [0 : 1] indicates direct or indirect address.
XX [0 : 3] indicates index register selection.
+/– [0 : 1] implies two’s complement notation; the sign is extended through bit 0 at execution.
v = Overflow
k = Carry
cc = Condition Codes:
a CCL (result < 0) or (opr1 < opr2)
CCE (result = 0) or (opr1 = opr2)
CCG (result > 0) or (opr1 > opr2)
Note: opr1 is first item pushed
on stack, opr2 is
second.
b CCL (ASCII numeric)
CCE (ASCII alphabetic)
CCG (ASCII special)
Table B-2. Binary Coding, Immediate Instructions
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 vk cc
10 0+/– Operand LDIa
1 0 0XX+/– Operand LDXI a
00 1+/– Operand CMPIa
0 0 2 +/– Operand ADDS a
00 3+/– Operand LADI ka
00 4 0 Operand ORRIa
0 0 4 1 Operand ORLI a
1 0 4 +/– Operand ADDI vk a
1 0 1XX+/– Operand ADXIvka
00 5+/– Operand LDLIa
0 0 6 +/– Operand ANRI a
00 7+/– Operand ANLIa
XX [0 : 3] indicates index register selection.
+/– [0 : 1] implies two’s complement notation; the sign is extended through bit 0 at execution.
v = Overflow
k=Carry
cc = Condition Codes:
a CCL (result < 0) or (opr1 < opr2)
CCE (result = 0) or (opr1 = opr2)
CCG (result > 0) or (opr1 > opr2)
Note: opr1 is first item pushed on
stack, opr2 is second.
Table B-1. Binary Coding, Memory Reference Instructions (page 2 of 2)