NonStop S-Series Server Description Manual (G06.27+)

Contents
HP NonStop S-Series Server Description Manual—520331-004
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Figures (continued)
Figures (continued)
Figure 4-5. Selectable and Flat Logical Segments Differ in Allocation Method 4-11
Figure 4-6. For TNS Compatibility, the First Four Relative Segments Are
Special 4-13
Figure 4-7. Main Stack and SRL Data for a Process Are in Nonprivileged
Space 4-15
Figure 4-8. The Last Eight Regions Are for Code Addressing 4-17
Figure 4-9. Native Process Has Two Regions for User Code, Four for
Libraries 4-19
Figure 4-10. TNS Process Has One Region for User Code, One for User
Library 4-21
Figure 4-11. Both TNS and Accelerated Code Are Included in a Code Region 4-23
Figure 4-12. Kseg0 and Kseg1 Both Map Permanently to Physical Memory 4-27
Figure 4-13. Kseg0 Is Used Primarily for Addressing System Code and Data 4-29
Figure 4-14. Kseg2 Provides Absolute Memory Allocations for Every Process 4-31
Figure 4-15. Access Through Kseg1 Is Direct: No Caching, No Address
Translation 4-33
Figure 4-16. Memory Access Through Kseg0 Uses Memory Caches 4-35
Figure 4-17. Memory Access Through Nonprivileged Space or Kseg2 Requires
Address Translation 4-37
Figure 4-18. The TLBPID Distinguishes the Address Space of a Process 4-39
Figure 4-19. Nonglobal Address Translations Require Matching TLBPID 4-41
Figure 4-20. Address Translation of Global Elements Ignores TLBPID 4-43
Figure 4-21. On TLB Miss, Nonprivileged Space and Kseg2 Space Translation Uses
Address-Mapping Tables 4-45
Figure 4-22. Special Pages Are Accessed Through Fixed Addresses 4-47
Figure 4-23. Unallocated Space Is Defined With a Few Null Tables 4-49
Figure 4-24.
Context-Bound Addresses Substitute for Aliases in Unaliased
Segments 4-51
Figure 5-1. Comparing Native and TNS Processes 5-3
Figure 5-2. A Native Process Uses Two Stacks; TNS Uses Three 5-5
Figure 5-3. Code and Data Allocations Are Separate and Treated Differently 5-7
Figure 5-4. Code Segments and Some Data Segments Can Be Shared 5-9
Figure 5-5. Only Two Kinds of Mode Transitions Are Permitted 5-11
Figure 6-1. Two Execution Modes Provide TNS Compatibility 6-3
Figure 6-2. TNS and Accelerated Modes Use TNS Addressing Conventions 6-5
Figure 6-3. The Environment Register Maintains Procedure State 6-7
Figure 6-4. The Register Stack Accumulates Arithmetic Results 6-8
Figure 6-5. The Top-of-Stack Can Occupy Various Positions in the Register
Stack 6-9