NonStop S-Series Server Description Manual (G06.27+)

TNS Data Formats and Number Representations
HP NonStop S-Series Server Description Manual—520331-004
3-10
Instructions for Decimal and Floating-Point
Arithmetic
All three indicators (V, CC, and K) can be tested by associated test-and-branch
instructions (branch-on-overflow, branch-on-condition-code, and branch-on-carry) and
the program execution sequence can be altered accordingly.
Instructions for Decimal and Floating-Point
Arithmetic
Decimal arithmetic can be performed only on quadrupleword operands. Two groups of
floating-point instructions permit use of both doubleword and quadrupleword operands.
Because the exponent field is the same size in both formats, the range of
representable numbers is the same; the extended format, however, provides greater
precision (in the fraction field).
Decimal Arithmetic
Decimal (base 10) arithmetic is provided indirectly. Decimal operations are performed
by explicitly converting operands from ASCII-digit string form to 64-bit binary form,
doing binary integer arithmetic, and then converting the result back to ASCII-digit string
form.
The quadrupleword operands used in the signed-arithmetic computation can represent
19-digit numbers in the range shown in the table in the preceding topic.
The following instructions are provided for converting operands between
quadrupleword and integer, logical, and doubleword data formats: CQI, CQL, CQD,
CIQ, CLQ, CDQ.
In addition, there are eight instructions (CFQ, CFQR, CEQ, CEQR, CQF, CQFR, CQE,
CQER) that provide conversions between quadrupleword operands and both forms of
floating-point operands (see Floating-Point Arithmetic, next), either with rounding or
without rounding.
Floating-Point Arithmetic
NonStop S-series servers support two schemes for floating-point arithmetic, IEEE and
TNS, using separate ways of encoding radix-2 floating-point numbers into 32-bit and
64-bit values, and using separate operations and separate algorithms. In TNS and
accelerated TNS programs, the only supported forms of floating-point arithmetic are
the legacy TNS floating-point formats, as used in the original NonStop systems. The
basic operations of floating add, multiply, compare, and so on, are implemented by
millicode routines, not by processor hardware. Native mode programs have a compile-
time choice between using the legacy TNS formats or using the industry standard IEEE
formats (IEEE Standard 754-1985). The IEEE scheme has much higher performance
and better numerical properties; the TNS scheme is data compatible with earlier
NonStop systems. IEEE-format values use the RISC processor’s floating-point
registers and floating-point circuits. Native use of TNS-format values is implemented
by integer operations in millicode routines, as in TNS and accelerated modes, with no
use of the RISC processor’s floating-point registers or circuits.