NonStop S-Series Server Description Manual (G06.27+)

Interrupt System
HP NonStop S-Series Server Description Manual—520331-004
8-13
TNS Interrupts
Time List (13) Every 10 milliseconds, the millicode detects an interval clock
interrupt, updates the quadrupleword clock at SG[%350], and
decrements the wait time of the element at the head of the time
list. If the wait time has gone to zero, control passes to the time
list interrupt handler; otherwise, no action is taken. There is no
parameter.
IPC and I/O (14) This interrupt occurs when a ServerNet interrupt requires
servicing. There is no parameter.
Dispatcher (15) This interrupt occurs when a DISP or SNDQ instruction is
executed, when a process-time timeout occurs, or when a
PSEM or VSEM instruction that requires operating system aid is
executed. The first parameter identifies which of these events
caused the interrupt.
Power On (16) This interrupt occurs when power is applied following a power
failure when memory is in a valid state. There is no parameter
for this interrupt.
Stack Overflow
(17)
This interrupt occurs when S exceeds 32,767 (the limit of the
memory stack) following the execution of any TNS instruction
(or Accelerator-generated equivalent) that can increase the S
register setting (PCAL, XCAL, DPCL, ADDS, BSUB, or PUSH)
or set it (SETS). In accelerated mode, the interrupt is less
precise. There is no parameter.
Arithmetic
Overflow (18)
This interrupt occurs when the T (trap enable) and V (arithmetic
overflow) bits in the ENV register are simultaneously set to 1.
The first parameter is not used. The second parameter contains
a code indicating the specifics of the occurrence. In accelerated
mode, this interrupt is less precise.
Instruction
Breakpoint (19)
This interrupt occurs when one of several possible RISC
BREAK instructions occur. This can happen when a TNS BPT
(or its accelerated equivalent) instruction is executed. The first
parameter is a code that identifies the kind of instruction
breakpoint that occurred.
Sampler (20) If the Measure system performance monitor is enabled, a
sampler interrupt is generated at a pseudorandom interval. The
interrupt handler is entered unconditionally. There is no
parameter.