NonStop S-Series Server Description Manual (G06.27+)

Input/Output Operations
HP NonStop S-Series Server Description Manual—520331-004
10-26
Communications Request Processing
Communications Request Processing
As stated back in the first topic of this section, transfers that are inbound to the host
server originate externally by some request from a workstation that is part of an
external network. Transfers that are outbound from the host server typically provide
information or control from some service in the NonStop processor. In either case, the
request is communicated to a ServerNet addressable controller, which assumes
control of the transfer. The operations that then follow consist of pushing and pulling
queue entries to and from a work queue, and pushing and pulling data to and from
data buffers. Figure 10-13 illustrates these four operations.
When the controller needs to pull a queue entry (or the queue pointers), it issues a
read request (1) to the ServerNet bus interface (SBI) that is located on its particular
ServerNet adapter (or MFIOB). It knows the ServerNet address of the entry by its own
local copy of the queue pointers or other saved information (the location of the
pointers, for example). The SBI then sends a ServerNet read request packet through
the ServerNet hardware (2) to the access validation and translation (AVT) logic in the
processor. The AVT logic validates the supplied ServerNet address, translates that
address to a physical address, and retrieves the entry from the work queue (3). The
AVT packages the entry into a ServerNet response packet and sends it to the SBI (4)
as part of the same ServerNet transaction. The SBI, expecting this response, forwards
the packet data (the queue entry) to the controller (5), as requested.
When the controller needs to push a queue entry (or queue pointer), it issues a write
request (1) to the ServerNet bus interface (SBI) that is located on its particular
ServerNet adapter (or MFIOB). The SBI then sends a ServerNet write request packet
through the ServerNet hardware (2) to the access validation and translation (AVT) logic
in the processor. The AVT logic sends a simple write response back to the SBI,
validates the supplied ServerNet address, translates that address to a physical
address, and writes the entry into the work queue (3).
When the controller needs to pull data from a data buffer in the processor, it issues a
read request (1) to the ServerNet bus interface (SBI). The SBI then sends a ServerNet
read request packet through the ServerNet hardware (2) to the access validation and
translation (AVT) logic in the processor. The AVT logic validates the supplied
ServerNet address, translates that address to a physical address, and retrieves the
data from the data buffer (3). The AVT packages the data into a ServerNet response
packet and sends it to the SBI (4) as part of the same ServerNet transaction. The SBI,
expecting this response, forwards the packet data to the controller (5), as requested.
The controller, when it has accumulated the full message from individual ServerNet
packets, then transmits the data to the external source that requested the data (6).
When the controller needs to push data that has come in from some external source
(1), it issues a write request (2) to the SBI. The SBI then sends a ServerNet write
request packet through the ServerNet hardware (3) to the access validation and
translation (AVT) logic in the processor. The AVT logic sends a simple write response
back to the SBI, validates the supplied ServerNet address, translates that address to a
physical address, and writes the packet data into the data buffer (4).