NonStop S-Series Server Description Manual (G06.27+)

TNS Instruction Set
HP NonStop S-Series Server Description Manual—520331-004
11-11
Definitions of TNS Instructions
ANG (000044). AND to Memory. The word in B is logically ANDed to a word in the
current data segment that is specified by a 16-bit address in A. The result remains in
the data segment location, and A and B are deleted from the stack. Condition Code is
set.
ANLI (007---). AND Left Immediate Operand With A. The 8-bit immediate operand is
shifted left eight places, the sign bit is propagated into the low-order bits, and the
resulting integer is logically ANDed to A. Condition Code is set. (For binary coding
details, refer to Table B-2 on page B-2; for an example, see Figure 11-6 on page 11-7.)
ANRI (006---). AND Right Immediate Operand to A. The 8-bit immediate operand is
extended to 16 bits by propagating the sign into the high-order bits, and the resulting
integer is logically ANDed to A. Condition Code is set. (For binary coding details, refer
to Table B-2 on page B-2; for an example, see Figure 11-6 on page 11-7.)
ANS (000034). AND to SG Memory. The word in B is logically ANDed to a word in the
system data segment that is specified by a 16-bit address in A. The result remains in
the system data location, and A and B are deleted from the stack. Condition Code is
set. This is a privileged instruction.
ANX (000046). AND to Extended Memory. The word in C is logically ANDed to a word
in memory that is specified by a 32-bit even-byte address in BA. The result remains in
the memory location, and A, B, and C are deleted from the stack. Condition Code is
set.
ARS (0303--). Arithmetic Right Shift. If the shift count field is zero, the word contained
in B is shifted right, propagating the sign bit, by the dynamic count contained in A. A is
then deleted from the stack. However, if the shift count field is not zero, A is shifted
right, propagating the sign bit, by that number. On single-word shifts, dynamic shift
counts greater than 31 or less than 0 give undefined results. Condition Code is set.
Refer to Figure 11-4 on page 11-5 for a comparison of logical (unsigned) shifts and
arithmetic (signed) shifts.
BANZ (-154--). Branch on A Not Zero. If the A register is nonzero, a direct or indirect
branch is taken (depending on the “i” field of the instruction). If the A register equals
zero, the next instruction is executed. In either case, A is deleted from the stack. For
binary coding details, refer to Table B-4 on page B-4.
BAZ (-144--). Branch on A Zero. If the A register equals zero, a direct or indirect
branch is taken (depending on the “i” field of the instruction). If the A register does not
equal zero, the next instruction is executed. In either case, A is deleted from the stack.
For binary coding details, refer to Table B-4 on page B-4.
BEQL (-12---). Branch if CC Is Equal. If the Condition Code in the ENV register is
CCE (N = 0, Z = 1), a direct or indirect branch is taken (depending on the “i” field of the
instruction). If the condition is not met, the next instruction is executed. For binary
coding details, refer to Table B-4 on page B-4.
BFI (000030). Branch Forward Indirect. The instruction expects an offset from the
current P register setting to be contained in A. An indirect branch is then made