PEEK Reference Manual

PEEK Reference Manual — 529657-006
Glossary - 1
Glossary
This glossary defines technical terms related to PEEK, to the internal design of the
operating system, and to the system architecture for the NonStop server.
active process. The process that is currently using the instruction processing unit (IPU) of a
processor. Contrast with inactive process.
API. See application program interface (API).
application program interface (API). A set of services (such as programming language
functions or procedures) that are called by an application program to communicate with
other software components. For example, an application program in the form of a client
might use an API to communicate with a server program.
ARITHOV. The PEEK INTERRUPTS element that reports arithmetic overflow traps. See
also trap.
backup path. A path not enabled as the preferred path. A backup path can become a
primary path when a primary path is disabled. Also called alternate path. Contrast
with primary path.
BKPT. The PEEK INTERRUPTS element that reports instruction breakpoint interrupts. See
also interrupt.
breakpoint. An object code location at which execution will be suspended so that you can
interactively examine and modify the process state. With symbolic debuggers,
breakpoints are usually at source line or statement boundaries.
In native object code for TNS/R or (H-series RVUs only) TNS/E, breakpoints can be at
any MIPS RISC instruction or (H-series RVUs only) Itanium instruction within a
statement. In a TNS object file that has not been accelerated, breakpoints can be at
any TNS instruction location. In a TNS object file that has been accelerated,
breakpoints can be only at certain TNS instruction locations, not at arbitrary
instructions. Some source statement boundaries are not available. However,
breakpoints can be placed at any instruction in the accelerated code.
BUS. This element reports interprocessor communication (IPC) traffic interrupts. See also
interrupt.
byte. Eight bits.
CCL. Mnemonic for the TNS instruction Condition Code Less Than.
CISC. See complex instruction-set computing (CISC).
CISC processor. An instruction processing unit (IPU) that is based on complex
instruction-set co
mputing (CISC) architecture. Contrast with
RISC processor.