PEEK Reference Manual
Glossary
PEEK Reference Manual — 529657-006
Glossary - 9
processor clock
processor clock. A hardware timer on each processor that keeps processor time (the
number of microseconds since system load).
PTLE. See process time-list element (PTLE).
ready processes. Processes that are prepared to become active.
reduced instruction-set computing (RISC). A processor architecture based on a relatively
small and simple instruction set, a large number of general-purpose registers, and an
optimized instruction pipeline that supports high-performance instruction execution. All
TNS/R processors use the RISC architecture. Contrast with complex instruction-set
computing (CISC).
relative extended address. An address that can be used when the processor is in
privileged or nonprivileged mode to access the user code, user library, and user data
spaces of the process. A relative extended address can also be used in privileged
mode to access the system code, system library, and system data spaces of the
process. A relative extended address cannot access extended memory.
requester. A process that initiates interprocess communication by sending a message to
another process. Contrast with server.
resident cache segment. A type of absolute segment with which no swap file is
associated. To use a frame occupied by a logical page of a resident cache segment,
the system must first ask permission of the segment owner if the page has been
changed while in memory.
resident segment. A type of absolute segment with which no swap file is associated. A
logical page in a resident segment must be locked before it can be accessed and must
remain locked while it is used.
RISC. See
reduced instruction-set computing (RISC).
RISC processor. An instruction processing unit (IPU) that is based on reduced
instruction-set computing (RISC) architecture. All TNS/R processors, such as the
NSR-G and NSR-W processors, use RISC processors. Contrast with
CISC processor.
SAMPLE. The PEEK INTERRUPTS element that reports Measure sampling interrupts. See
also
trap.
SCHANL. The PEEK INTERRUPTS element that rep
orts special channel error interrupts.
See also
interrupt.
SEM. See
OSS SEM.
SHM. See
OSS SHM.
server. (1) An implementation of a system used as a stand-alone system or as a node in a
network. (2) A combination of hardware and software designed to provide services in