Processor Halt Codes Manual

1 Overview
When certain unrecoverable hardware, millicode, system configuration, or operating-system
software errors occur in a processor, the operating system stops everything that is executing in this
processor. Other processors in the system may or may not be affected by this halt.
In this manual, halt code documentation is divided into:
• Millicode halt codes, generated by the millicode (Chapter 2 (page 12))
• Processor halt codes, generated by the system software (Chapter 3 (page 97))
Cause, effect, and suggested recovery procedures are included for each halt code.
Processor Halt Descriptions
There are two types of processor halts:
• A processor can be halted by a halt instruction.
When the operating system detects a millicode or software error that it cannot correct, it can
execute a halt instruction to suspend all application and system processes running in the
associated processor. The status of the halted processor becomes:
Halt code = %nnnnnn
or
Millicode halt %nnnnnn
Unlike a freeze instruction, a halt instruction affects only one processor.
If you see a text message with no numeric code, you can find the text message in Table 2
(page 12), then look up the description for the corresponding halt code in Chapter 2 (page 12).
• A processor can be halted by a freeze instruction.
A freeze-enabled processor can be frozen by another frozen processor. When a freeze
instruction is executed, any processors that are freeze-enabled also freeze immediately. When
the operating system detects a software error that it cannot correct, it can execute a freeze
instruction to suspend all application and system processes running in the associated processor.
The status of the frozen processor becomes:
Freeze code = %nnnnnn
Processor Halt Monitoring and Recovery
NonStop servers are monitored and serviced from an HP approved system console using either
HP Open System Management (OSM) or Compaq TSM software. In the event of a halt, halt codes
are displayed in the OSM Service Connection or TSM Low-Level Link, within the Processor Status
dialog box.
For information about monitoring and recovery of halts, see the section about processor monitoring
and recovery in the NonStop S-Series Operations Guide or the NonStop NS-Series Operations
Guide
For information about OSM, see the OSM User’s Guide (available as online help within the OSM
Service Connection) or the OSM Low-Level Link online help. For information about TSM, see the
TSM Online User Guide.
NOTE: If a memory dump is requested as part of a recovery, for processors with more than 2
gigabytes of memory, use the Tandem Failure Data System (TFDS) memory dump facility to ensure
that the dump occurs in a timely fashion. Otherwise, use either RCVDUMP or the TFDS facility.
TFDS must be configured on the system before the halt occurs.
For information about TFDS, see the TFDS Manual.
10 Overview