Processor Halt Codes Manual

Cause
The Read FIFO queue was not empty on the entrance into a halt loop, indicating that the
interprocessor bus (IPB) chip could be failing.
Effect
The processor halts. The rest of the system is not affected.
Recovery
This halt can indicate a hardware failure. See Processor Halt Monitoring and Recovery (page 10).
Before taking a memory dump, contact your service provider or the Global NonStop Solution
Center (GNSC), as directed by your local operating procedures.
%100100 Hard reset performed
Cause
The processor was manually reset by a reload, by the operating system, by the OSM or TSM
facility, or by an operator.
Effect
The processor halts. The rest of the system is not affected.
Recovery
Load the processor. If this operation fails, contact your service provider or the Global NonStop
Solution Center (GNSC), as directed by your local operating procedures.
%100207 Unexpected break
Cause
The millicode detected an unexpected break condition from the boot code. The processor is
already halted, or the system image has not been loaded into the processor.
Effect
The processor halts. The rest of the system is not affected.
Recovery
See Processor Halt Monitoring and Recovery (page 10). Before taking a memory dump, contact
your service provider or the Global NonStop Solution Center (GNSC), as directed by your local
operating procedures.
%100210 Unexpected interrupt
Cause
The boot millicode detected an unexpected interrupt. The processor is already halted, or the
system image has not been loaded into the processor.
Effect
The processor halts. The rest of the system is not affected.
Recovery
See Processor Halt Monitoring and Recovery (page 10). Before taking a memory dump, contact
your service provider or the Global NonStop Solution Center (GNSC), as directed by your local
operating procedures.
%100211 Bus error - hard abort
Cause
The processor detected a bus error caused by a hard abort.
Effect
The processor halts. The rest of the system is not affected.
Millicode Halt Codes 19