Processor Halt Codes Manual

Required RecoveryEffectCause
Because the batteries and MOS FET
are periodically checked when the
system is operating (and reported if
bad), then this scenario should only
happen when the batteries discharge
too quickly or can not hold the proper
charge.
The message is expected.When power is restored, a POST
operation is executed for each CRU
in the affected enclosures.
Power-fail event occurs for a
processor.
The duration of the event exceeds the
configured
1
ride-through time but not
Do not replace the battery. Use OSM
or TSM to enable the batteries.
A “POST has successfully completed”
message is generated for each
operation.
the expected
2
battery life for the
batteries supporting the enclosure.
If the batteries are turned off, this
event is logged and the OSM or TSM
facility displays the battery in yellow.
There is nothing wrong with the
Low-Level Link batteries. The batteries
have been disabled using OSM or
TSM.
The message is not expected.A “POST has successfully completed”
message is generated (for one or
more CRUs in an enclosure).
Power-fail event occurs for a
processor.
None of the aforementioned causes
have occurred.
Do not replace the battery. Some other
problem is indicated.
The most probable cause is hardware
component failure. Investigate and
A %100526 halt is indicated for one
or both processors in the enclosure.
determine what hardware component
failed, thereby causing the power-fail
cycle.
Remedy the problem.
1
ride-through time: During the ride-through time (the default is 30 seconds) the system operates as if there has been no
power loss (that is, power is obtained from the batteries). Therefore, the system survives short power failures without
any adverse effects. The ride-through time can be configured with an SCF command. The value is used for the entire
node (system).
2
low-power mode:
• If the power fail event last more than 30 seconds, the system goes into low-power mode. If the power fail event
interval is less than the time it takes to drain the batteries (45 minutes according to the battery specification), then
the memory in the processors is preserved and the system can be restarted without the need for reloading . In this
case, the POST operation is not executed.
• If the power fail event lasts more than 45 minutes, when power is restored to the system the memory has been lost.
In this case, the POST operation is executed.
%100530
Cause
The boot millicode received an unexpected NAK from the I/O driver.
Effect
The processor halts. The rest of the system is not affected.
Recovery
See Processor Halt Monitoring and Recovery (page 10). After taking a memory dump, contact
your service provider or the Global NonStop Solution Center (GNSC), as directed by your local
operating procedures.
%100531
Millicode Halt Codes 45