TAL Programmer's Guide Data Alignment Addendum Abstract This publication is for application programmers familiar with HP NonStop servers and the HP NonStop operating system. It documents the data alignment requirements of the compiler for the HP Transaction Application Language (TNS TAL compiler [T9250]) and the misalignment diagnostic tools added in G06.17.
Document History Part Number Product Version 524967-003 NonStop Operating System G09, H01 Subsystem Control Facility G02, H01 Published July 2005
TAL Programmer's Guide Data Alignment Addendum Glossary Index Examples Tables What’s New in This Addendum iii Addendum Information iii New and Changed Information iii About This Addendum v Audience v Related Reading v Abbreviations vi 1. Introduction 2. Misalignment Tracing Facility 3. Misalignment Handling 4.
Examples Contents Examples Example 4-1. Example 4-2. Example 4-3. Example 4-4. Example 4-5. Example 4-6. Example 4-7. Example 4-8. Example 4-9.
What’s New in This Addendum Addendum Information TAL Programmer's Guide Data Alignment Addendum Abstract This document is for application programmers familiar with HP NonStop servers and the HP NonStop operating system. It documents the data alignment requirements of the compiler for the HP Transaction Application Language (TNS TAL compiler [T9250]) and the misalignment diagnostic tools added in G06.17.
What’s New in This Addendum New and Changed Information TAL Programmer's Guide Data Alignment Addendum—524967-003 iv
About This Addendum • • • Audience on page v Related Reading on page v Abbreviations on page vi Audience This addendum is intended for application programmers who are familiar with the following HP NonStop systems products: • • • NonStop servers NonStop operating system TNS TAL compiler (T9250) Related Reading Manual Description (page 1 of 2) Accelerator Manual Data Alignment Addendum Describes the data alignment requirements of the Accelerator.
Abbreviations About This Addendum Manual Description (page 2 of 2) TAL Programmer’s Guide Explains how to use the HP Transaction Application Language (TAL). TAL Reference Manual Describes the TAL programming language. Abbreviations CISC. complex instruction-set computing EPIC. explicitly parallel instruction set computing EMS. Event Management Service RISC. reduced instruction-set computing SCF. Subsystem Control Facility RVU. release version update TAL.
1 Introduction Programs compiled with the TNS instruction set must follow the even-byte data alignment rules of TNS compilers. Certain violations of these programming rules might lead to run-time errors. This addendum describes these violations and explains how to avoid them and how to diagnose them at run time. TNS systems treat all nonbyte data as one or more 16-bit words.
Introduction TAL Programmer's Guide Data Alignment Addendum—524967-003 1 -2
2 Misalignment Tracing Facility The misalignment tracing facility is enabled or disabled for all processors in the node. By default, it is enabled (set to ON). It can be disabled (set to OFF) only by the persons who configure the system, by means of the Subsystem Control Facility (SCF) attribute MISALIGNLOG. Instructions are in the SCF Reference Manual for the Kernel Subsystem. Note.
Misalignment Tracing Facility TAL Programmer's Guide Data Alignment Addendum—524967-003 2 -2
3 Misalignment Handling Misalignment handling is determined by the following SCF attributes, which are set system-wide (that is, for all processors in the node) by the persons who configure the system: • • • MISALIGNLOG TNSMISALIGN NATIVEATOMICMISALIGN (applies only to programs running in release version update (RVU), and therefore, does not apply to TAL programs) MISALIGNLOG enables or disables the tracing facility (see Section 2, Misalignment Tracing Facility).
Misalignment Handling The method that you choose does not apply to every misaligned address, only to those that would have been rounded down in RVUs prior to G06.17. Note. ROUND and NOROUND misalignment handling are both intended as temporary solutions, not as a substitute for changing your program to ensure that it has only aligned addresses.
4 TAL Misalignment Examples In TNS mode and accelerated mode, the targets of nonstring pointers and nonstring reference parameters must be aligned on 2-byte memory boundaries for correct operation. TAL and other TNS compilers automatically guarantee this alignment for all compiler-managed variables; however, certain source errors involving pointers can create odd-byte misalignments that are not detected at compilation time.
TAL Misalignment Examples Invalid Conversion of Odd-Byte String Addresses Example 4-1. TAL Null Pointer Check Change this: DEFINE NULL = -1d#; struct listnode (*); begin int status; ... int(32) next; end; int .ext listhead (listnode); int .ext node (listnode); @node := @listhead; while node.status = okay !used too soon! and @node <> NULL do begin ... @node := node.next; end; To this: DEFINE NULL = -1d#; struct listnode (*); begin int status; ... int(32) next; end; int .ext listhead (listnode); int .
TAL Misalignment Examples Invalid Conversion of Odd-Byte String Addresses 2. Equating pointers without direct assignment Equating a pointer with another pointer or with an integer is safe when the values of the equations are mutually exclusive in time or when an equivalent explicit assignment of the address value would be correct at run time. See Example 4-4 on page 4-5. 3. Calling a misdeclared external procedure Actual parameters are implicitly assigned to formal parameters, by pointer or by value.
TAL Misalignment Examples Invalid Conversion of Odd-Byte String Addresses 10. Using 16-bit addressing and ignoring the representational difference between byte pointers and word pointers The following declaration applies only to some byte-aligned substructures: STRING .node (node^template); The preceding declaration is not pointer-compatible with the following declaration, which applies to all structures and to most substructures: INT .
Invalid Conversion of Odd-Byte String Addresses TAL Misalignment Examples Example 4-3. TAL Assignment of String Pointer to int Pointer (Item 1, Item 5) Change this: ! insert 16-bit length at beginning of long string: string .ext name; int .ext words; @words := @name; ! legal only when name has even address words := lth; ! misalignment traps here To this: ! insert 16-bit length at beginning of long string: string .ext name; int .ext words; name[0] := lth '>>' 8; name[1] := lth; Example 4-4.
TAL Misalignment Examples Invalid Conversion of Odd-Byte String Addresses Example 4-6. TAL Hashing Strings by Means of int Operations (Item 4) Change this: string .ext name; int .ext name_as_ints = name; int lth; int checksum := 0; while lth >= 2 do begin checksum := checksum + name_as_ints; @name := @name[2]; lth := lth - 2; end; if lth > 0 then checksum := checksum + (name '<<' 8); ! misalignment traps here To this: string .
TAL Misalignment Examples Incorrect Layout Example 4-8. TAL Code That Depends on Rounded-Down Addresses (Item 8) Change this: int proc extract(bitvect,n); ! extract nth bit of bit-vector int .ext bitvect; int n; begin int .
TAL Misalignment Examples Incorrect Layout 3. Appending a sequence of objects into a string buffer or string array If a TNS program appends a sequence of objects into a string buffer or a string array, it must ensure that nonstring objects are aligned and allocated on even-byte boundaries. Example 4-9.
Glossary See also the glossary in the TAL Programmer’s Guide. accelerated mode. See TNS accelerated mode. aligned. In TNS/R native mode, a data item is aligned if its address is a multiple of its size; for example, a 4-byte data item is aligned if its byte address is a multiple of 4. Explicitly Parallel Instruction Computing (EPIC). The technology that forms the basis for the Intel® Itanium® architecture.
TNS mode Glossary TNS mode. The operational environment in which TNS instructions execute by inline interpretation. See also TNS accelerated mode and TNS/R native mode. TNS/E native mode. The primary execution environment on a TNS/E system, in which native-compiled Intel® Itanium® object code executes, following TNS/E native-mode compiler conventions for data locations, addressing, stack frames, registers, and call linkage. Compare to TNS interpreted mode and TNS accelerated mode.
Index Numbers F 16-bit addressing 4-4 32-bit addressing 4-4 FAIL misalignment handling method 3-1/3-2 Files, header 4-3 Filler bytes 4-7, 4-8 Functions 4-3 A Abnormal program termination 4-1 Address misalignment causes of general 1-1 in TAL programs 4-1/4-8 handling 3-1/3-2 tracing facility for 2-1 Atomic functions 4-3 H Hashing functions 4-3 Header files 4-3 Heap allocation, customizing 4-7 I Implicit filler bytes 4-7, 4-8 Instruction Failure trap (trap #1) 3-1 Invalid pointers 4-1 B Bit vectors 4-3
P Index P T Parameters 4-1 Pointers alignment of targets of 4-1 assignments to 4-2 equating without direct assignment 4-3 extended 4-4 for single-byte access 4-3 invalid 4-1 null 4-1 uninitialized 4-1 Procedures, external 4-3 Production systems 3-1 TAL 4-1/4-8 TNSMISALIGN attribute (SCF) 3-1 Tracing facility 2-1 Trap #1 3-1 U Uninitialized pointers 4-1 V Variables, redefined or equivalenced 4-1, 4-3 Special Characters R Redefined variables 4-1, 4-3 ROUND (default) misalignment handling method 3-1/3
