PCI Error Handling Product Note 3rd Edition

| | | | |
MP | 15.22 | | | |
ED | 3.13 | | | |
CLU | 15.2 | 15.2 | 15.2 | 15.2 |
PM | 15.0 | 15.0 | 15.0 | 15.0 |
CIO (bay 0, chassis 1) | 15.0 | 15.0 | 15.0 | 15.0 |
CIO (bay 0, chassis 3) | 15.0 | 15.0 | 15.0 | 15.0 |
CIO (bay 1, chassis 1) | 15.0 | 15.0 | 15.0 | 15.0 |
CIO (bay 1, chassis 3) | 15.0 | | 15.0 | 15.0 |
On the mid-range systems that support PCI Error Handling, the system firmware version
will be listed with the Pri SFW heading as illustrated in the following example:
MP:CM> sysrev
Cabinet firmware revision report
PROGRAMMABLE HARDWARE :
System Backplane : GPM FM OSP
------- ------- -------
1.002 1.002 1.002
PCI-X Backplane : LPM HS
------- -------
2.000 1.000
Core IO : Master Slave
-------- -------
2.010 2.010
LPM PDHC
------- -------
Cell 0 : 1.002 1.010
Cell 1 : 1.002 1.010
Cell 2 : 1.002 1.010
Cell 3 : 1.002 1.010
FIRMWARE:
8 PCI Error Handling Product Note