PCI / PCIe Error Recovery Product Note, September 2010

Table 1-1 Utility Subsystem FW Revision Level: 15.22 (continued)
15.215.215.215.2CLU
15.015.015.015.0PM
15.015.015.015.0CIO (bay
0, chassis
1)
15.015.015.015.0CIO (bay
0, chassis
3)
15.015.015.015.0CIO (bay
1, chassis
1)
15.015.015.0CIO (bay
1, chassis
3)
On the mid-range systems that support PCI Error Recovery, the system firmware version
will be listed with the Pri SFW heading as illustrated in this example:
MP:CM> sysrev
Cabinet firmware revision report
PROGRAMMABLE HARDWARE :
System Backplane : GPM FM OSP
------- ------- -------
1.002 1.002 1.002
PCI-X Backplane : LPM HS
------- -------
2.000 1.000
Core IO : Master Slave
-------- -------
2.010 2.010
LPM PDHC
------- -------
Cell 0 : 1.002 1.010
Cell 1 : 1.002 1.010
Cell 2 : 1.002 1.010
Cell 3 : 1.002 1.010
FIRMWARE:
Core IO
Master : A.007.008
Event Dict. : 0.009
Slave : A.007.008
Event Dict. : 0.009
Cell 0
PDHC : A.003.027
Pri SFW : 23.001 (PA)
Sec SFW : 23.001 (PA)
Cell 1
PDHC : A.003.027
Pri SFW : 23.001 (PA)
Sec SFW : 23.001 (PA)
Cell 2
PDHC : A.003.027
Pri SFW : 23.001 (PA)
Sec SFW : 23.001 (PA)
Confirm PCI Error Recovery is Supported 7