Technologies for the ProLiant ML570 G3 and ProLiant DL580 G3 Servers Technology Brief

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Technologies for the ProLiant ML570 G3 and ProLiant

DL580 G3 servers

technology brief

Abstract.............................................................................................................................................. 3

Introduction......................................................................................................................................... 3

Processor architecture........................................................................................................................... 3

Defining 64-bit architecture ............................................................................................................... 3

Xeon processor MP .......................................................................................................................... 4

Memory architecture ............................................................................................................................ 5

Background: memory banks and ranks ............................................................................................... 5

Intel E8500 chipset .......................................................................................................................... 6

Partitioning for electrical isolation................................................................................................... 7

Maximum memory configurations................................................................................................... 7

High-performance memory ................................................................................................................ 7

DDR-2 memory............................................................................................................................. 8

Memory interleaving..................................................................................................................... 8

Errors in memory............................................................................................................................ 11

Hard and soft errors ................................................................................................................... 11

Correctable and uncorrectable errors............................................................................................ 12

Standard ECC............................................................................................................................ 12

Advanced ECC (single device data correction) .............................................................................. 12

Demand scrubbing ..................................................................................................................... 12

High-availability memory technologies.............................................................................................. 13

Hot-plug definitions..................................................................................................................... 13

Online Spare ............................................................................................................................. 13

Hot Plug Mirrored Memory .......................................................................................................... 13

Hot Plug RAID ............................................................................................................................ 14

Comparing Advanced Memory Protection technologies ...................................................................... 14

Ensuring reliability within large-footprint memory designs.................................................................... 15

Architecture trade-offs with a large memory footprint .......................................................................... 16

Updated I/O technologies.................................................................................................................. 17

PCI Express ................................................................................................................................... 17

Smart Array 6i controller................................................................................................................. 18

Mechanical design for serviceability .................................................................................................... 18

Common components ..................................................................................................................... 18

Summary of content (24 pages)

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Technologies for the ProLiant ML570 G3 and ProLiant DL580 G3 servers technology brief Abstract.............................................................................................................................................. 3 Introduction......................................................................................................................................... 3 Processor architecture..................................................................................................
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ProLiant ML570 G3........................................................................................................................ 20 ProLiant DL580 G3 ........................................................................................................................ 22 Conclusion........................................................................................................................................ 23 Appendix A. Engineering prefixes ..............................................
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Abstract With the third-generation of ProLiant 500-series servers —the ProLiant ML570 G3 and the ProLiant DL580 G3 servers — IT managers have additional choices for servers that can transition easily from 32-bit to 64-bit x86 processing. The architecture for the ProLiant ML570 G3 and the DL580 G3 uses the Intel® 64-bit Xeon™ processor MP designed to operate in either 32-bit or 64-bit mode, depending on the application and operating system (OS) utilized.
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This can result in performance advantages for the 64-bit architectures because of their ability to use large amounts of memory, such as with intensive floating-point calculations used in scientific and engineering modeling programs.
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2003 SP1, Microsoft Windows XP SP2, SuSe Linux Enterprise Server 9.2, or Red Hat Enterprise Linux 3 Update 3. For additional information about these processors, see the Intel website or the technology brief titled “The Intel processor roadmap for industry-standard servers.” 4 Memory architecture The ProLiant ML570 G3 and the ProLiant DL580 G3 both use the Intel E8500 chipset architecture, resulting in the same core technologies for the memory subsystem.
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Intel E8500 chipset The E8500 chipset has a high-availability memory subsystem that consists of the North Bridge (TNB) and the XMB memory controller. The E8500 chipset is designed to support the upcoming dual-core versions of Intel processors, and has the important feature of using two separate front side buses to connect to the processors (Figure 2). Each north bridge can connect to up to four memory boards, and each memory board includes an XMB memory controller chip.
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Partitioning for electrical isolation One of the features of a well-designed chipset is the degree to which the silicon is partitioned to allow different signal areas to be electrically isolated. The E8500 chipset is partitioned so that the front-side bus interconnects to a partitioned area for the “left” CPU, the “right” CPU, and each memory board (Figure 3).
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and the ProLiant DL580 G3 use DDR2-400 memory and interleaving to improve memory performance and decrease this performance gap. DDR-2 memory DDR-2 SDRAM is the second generation of DDR SDRAM. In contrast to the first generation, DDR-2 memory operates at an even lower voltage (1.8V) to further reduce power consumption; uses higher clock frequencies to increase data transfer rates, and uses on-die termination control to improve signal quality.
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Two-way interleaving Like previous ProLiant servers, the ML570 G3 and the DL580 G3 servers use two-way, or dualchannel, interleaving. Two-way interleaving works by dividing memory into 64-bit blocks that can be accessed two at a time through the two memory channels in an XMB controller (Figure 5). This results in twice the amount of data obtained in a single memory access and reduces the required number of memory accesses.
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Figure 6. Rank interleaving splits cache lines across a group of memory ranks. Interleaving across XMB memory controllers Because there are up to four XMB memory controllers (one per memory board), the north bridge device also splits requested cache lines among all memory controllers. This type of interleaving is automatically enabled when using more than one memory board (if hot add is disabled).
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Figure 7. With interleaving across XMB memory controllers, the north bridge interleaves the cache lines among the memory board subsystems (moving down vertically in the schematic). Rank interleaving would then interleave cache lines horizontally, as depicted with cache line 5. Errors in memory The move to a 64-bit architecture naturally leads to servers that support more memory capacity to fully utilize the capabilities of the 64-bit architecture.
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are affected by the increased density of memory devices, system voltage and timing margins, memory system operating frequencies, radioisotropic impurities in packaging and circuit board materials, and even magnetic variations due to altitude/location around the earth. Soft errors can be corrected using standard or advanced ECC. Because a soft error is not caused by a problem with the DIMM, once the data is corrected, the same error will not recur in the same component.
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Demand scrubbing allows the chipset to write back good data on a memory read if a correctable memory error is detected. If future reads occurred at that same memory location without the data being scrubbed, the chipset would detect another correctable error, which may result in the system marking the DIMM as degraded. For soft errors, demand scrubbing will prevent all subsequent correctable errors after the first error is encountered.
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The ProLiant ML570 G3 and the DL580 G3 support mirroring of two or four memory boards, allowing the server to be completely protected from memory failures. However, the customer effectively uses half of the installed memory capacity (for example, if 4 GB is installed, only 2GB is available to the OS and applications). The mirroring functionality requires no OS support but does require each installed memory board to have the same total amount of memory.
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errors and does not provide any capability of replacing failed or degraded DIMMs without shutting down the server. Online Spare memory reduces the likelihood of uncorrectable memory errors but does not protect against uncorrectable memory errors. Like advanced ECC, Online Spare provides no capability of replacing failed or degraded DIMMs without shutting down the server. The amount of memory reserved for the Online Spare rank will vary from one system configuration to the next.
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After the server is shipped to the customer, HP provides Pre-Failure Warranty support standard on all ProLiant servers. HP Systems Insight Manager notifies the administrator when a critical component may fail. During the warranty period, the Pre-Failure Warranty covers the replacement of DIMMs used in a server’s main memory when the predefined thresholds for correctable errors have been exceeded. The Pre-Failure Warranty provides for the components to be replaced free of charge under the warranty.
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Updated I/O technologies Two capabilities are being used in the ProLiant ML570 and DL580 G3 servers which were not present in previous generations of the 500-series servers: PCI Express (available on both servers) and the use of the HP Smart Array 6i storage controller on the ProLiant DL580 G3. The ProLiant ML570 G3 and DL580 G3 support PCI Express and PCI-X technology to give customers the option to use whichever I/O cards fit their purposes.
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Smart Array 6i controller The ProLiant DL580 G3 includes the embedded Smart Array 6i controller. This integrated Smart Array controller is the first to support the Ultra320 SCSI interface which provides data transfer rates of up to 320 MB/s per channel. Because of the use of a common low-voltage differential signaling protocol, the Smart Array 6i supports Ultra2, Ultra3, and Ultra320 SCSI drives. Certain models of the ProLiant DL580 G3 ship standard with the 128 MB battery-backed write cache enabler (BBWC).
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The processor heat sink design includes three guiding pins and also a special locking lever mechanism to reduce the likelihood of damaging the processor when inserting the heat sink (Figure 10). The lever, which is extended out for easy access, has to be in the proper position before it can lock the heat sink down onto the processor. Figure 10. Processor heat-sink design. The ProLiant ML570 and the DL580 G3 use a single redundant, hot-plug fan form factor throughout the servers.
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Figure 11. Diagnostic displays for the ProLiant ML570 G3 (on the left side) and the ProLiant DL580 G3 (on the right side). ProLiant ML570 G3 ProLiant DL580 G3 ProLiant ML570 G3 The ProLiant ML570 G3 is a more compact (6U) and lightweight design than the G2 model. It is almost a cable-less design, having half the number of cables that the G2 model had. The chassis is two levels, with most of the components on the top level (Figure 12). These components plug into the system board for easy access.
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shipment. In the G3 model, the administrator can either remove the center wall (with the fans installed) as one piece or just remove the half of the center wall that is retaining the VRMs to update the processor and VRM (Figure 13). Figure 13. A portion of the center wall (image shown on the left) can be removed (image on the right) to insert additional VRMs for the processors.
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ProLiant DL580 G3 The ProLiant DL580 G3 provides a compact design for a powerful 4-way server. Like the ProLiant ML570 G3, the DL580 G3 uses plug-in components to eliminate many of the cables. One of the most important aspects of the design is that the all the memory modules, processors, and disk drives are easily accessible from the front of the unit (Figure 14). Figure 14. Memory, processors, and disk drives are easily accessible on the ProLiant DL580 G3 server.
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remove the processor cage from the server chassis, then use this same blue touchpoint latch to open the top sheet metal cover to the processor cage (Figure 16). Figure 16. Dual latch used for the processor cage. Conclusion The ProLiant ML570 G3 and the ProLiant DL580 G3 servers are the first enterprise class, 4-way servers to offer high performance combined with the increased reliability of Hot Plug RAID memory.
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Appendix A.