User Manual

QuickSpecs
HPE ProLiant DL360 Gen10 Server
Standard Features
Page
10
NOTES:
6-Channel DDR4 @ 2133 MT/s.
2TB max RAM
Support for: Intel® Vector Neural Network Instructions (VNNI) for inference acceleration..
2 and 4 socket capable, 2S - 2UPI, 2S - 3UPI, 4S - 3UPI @ 9.6 GT/s.
Intel AVX-512 (2x 512-bit FMA).
48 lanes PCIe 3.0, standard RAS
1
st
Generation Intel® Xeon® Scalable Processor Family
Intel Xeon Models
CPU
Frequency
Cores
L3 Cache
Power
UPI
DDR4
Memory per
socket
Bronze 3106 Processor
1.7 GHz
8
11.00 MB
85W
2 @ 9.6 GT/s
2133 MT/s
768GB
Bronze 3104 Processor
1.7 GHz
6
8.25 MB
85W
2 @ 9.6 GT/s
2133 MT/s
768GB
NOTES:
6-Channel DDR4 @ 2133 MT/s, 768 GB max memory capacity.
2 socket capable, 2S - 2UPI @ 9.6 GT/s.
Intel AVX-512 (1x 512-bit FMA).
48 lanes PCIe 3.0, standard RAS.
Chipset
Intel C621 Chipset
NOTE: For more information regarding Intel® chipsets, please see the following
URL: https://www.intel.com/content/www/us/en/products/chipsets/server-chipsets.html
System Management Chipset
HPE iLO 5 ASIC
NOTE: Read and learn more in the iLO QuickSpecs.
Memory
Type
HPE DDR4 SmartMemory
Registered (RDIMM), Load Reduced (LRDIMM)
DIMM Slots Available
24
12 DIMM slots per processor, 6 channels per processor,
2DIMMs per channel
Maximum capacity (LRDIMM)
3.0 TB
24 x 128 GB LRDIMM @ 2933 MT/s
Maximum capacity (RDIMM)
1.54 TB
24 x 64 GB RDIMM @ 2933 MT/s
Maximum capacity
(HPE Persistent Memory)
6.0 TB
12 X 512 GB HPE Persistent Memory Kit @ 2666 MT/s
NOTE: HPE Persistent Memory only supported on 2
nd
generation Intel Xeon Scalable Processors (Platinum 8200, Gold 6200, Gold
5200, and 4215 only)
NOTE: Maximum memory per socket is dependent on processor selection. 2
nd
generation processors supporting 2 TB or 4.5 TB
per CPU are indicated by the “M” and “L” in the processor model names (i.e. 8276M and 8276L). 1
st
generation processors
supporting 1.5 TB per CPU are indicated by the “M” in the processor model names (ie 8160M)
NOTE: Mixing of RDIMM and LRDIMM memory is not supported.
NOTE: For General Server Memory and Persistent Memory Population Rules and Guidelines for Gen10 see details here:
http://www.hpe.com/docs/memory-population-rules
Memory Protection
Advanced ECC
Advanced ECC uses single device data correction to detect and correct single and all multibit error that occurs within a sing
le DRAM
chip.