Installation Instructions
Table Of Contents
- Title page
- Contents
- About this manual
- Safety information
- Ch 1 - Introduction
- Ch 2 - Adding cards to the Controller
- Unpacking the System Controller
- Unpacking the picocells
- System Controller card configuration
- Adding cards to the System Controller (first steps)
- Jumper and DIP switch settings
- Attaching bus cables
- Adding cards to the System Controller (final steps)
- Configuring Controller cards
- Verifying the card configuration
- Ch 3 - Installing the Controller
- Ch 4 - Verifying the Controller configuration
- Ch 5 - Configuring the router
- Ch 6 - Testing picocells
- Ch 7 - Installing picocells
- Ch 8 - Connecting to external equipment
- Ch 9 - System testing
- Ch 10 - Installation inspection
- Ch 11 - Provisioning
- Ch 12 - Remote Client
- Ch 13 - Troubleshooting
- Ch 14 - Maintaining Quad T1 cards
- App A - Specifications
- App B - Standards compliance information
- App C - Part numbers
- App D - Updates and backups
- Index
1026209–0001 Revision B 2–20 Adding cards to the System Controller
In the event of a problem with the SBC (slot 12), make sure DIP
switch SW1 is set correctly, depending on the installed CPU, and
check all jumpers.
Processor configuration
The standard CPU shipped with the AIReach OS System
Controller is an Intel Pentium II, 450 MHz processor. Normally,
the system BIOS autodetects the CPU and sets the system bus
frequency accordingly. If the BIOS does not do this, or if you elect
to use a different processor, you must set DIP switch SW1 to the
correct bus frequency and processor multiplier for the CPU, as
specified in table 2-4 . The location of switch SW1 is shown in
Figure 2-13.
Figure 2-13 SBC jumper and DIP switch locations
T0001019
Rear
bracket
DIMM memory
Pentium II processor
Battery
JP2 - CMOS
operation
JP3 - Watchdog
timeout interrupt
JP4 - PnP
and flash
BIOS
upgrade
J17 -
Watchdog
timer
DIP switch SW1
As shown in Table 2-4 , switch SW1–1 selects the processor front
side bus frequency (FSB), more commonly known as the bus or
memory frequency. Switches SW1–2 to SW1–5 select the
processor multiplier.
Single board computer
(SBC)