Instruction Manual

NANO-945GSE2
Page vii
5.5.2 Boot Device Priority ...................................................................................... 102
5.6 SECURITY............................................................................................................... 102
5.7 CHIPSET ................................................................................................................. 103
5.7.1 Northbridge Chipset Configuration............................................................... 104
5.7.2 Southbridge Configuration ............................................................................ 106
5.8 EXIT ....................................................................................................................... 107
6 SOFTWARE DRIVERS ............................................................................................ 109
6.1 AVAILABLE SOFTWARE DRIVERS .............................................................................110
6.2 STARTING THE DRIVER PROGRAM ...........................................................................110
6.3 CHIPSET DRIVER INSTALLATION..............................................................................112
6.4 VGA DRIVER INSTALLATION...................................................................................116
6.5 LAN DRIVER INSTALLATION.................................................................................. 120
6.6 AUDIO DRIVER INSTALLATION ............................................................................... 123
6.6.1 AC’97 Driver Installation .............................................................................. 123
6.7 INTEL
®
MAT RI X STORAGE MANAGER DRIVER INSTALLATION................................ 126
6.8 ISMM INSTALLATION............................................................................................. 131
A BIOS OPTIONS ........................................................................................................ 138
B TERMINOLOGY...................................................................................................... 142
C DIGITAL I/O INTERFACE..................................................................................... 146
C.1 INTRODUCTION...................................................................................................... 147
C.2 DIO CONNECTOR PINOUTS.................................................................................... 147
C.3 ASSEMBLY LANGUAGE SAMPLES........................................................................... 148
C.3.1 Enable the DIO Input Function..................................................................... 148
C.3.2 Enable the DIO Output Function.................................................................. 148
D WATCHDOG TIMER .............................................................................................. 149
E COMPATIBILITY .................................................................................................... 152
E.1 COMPATIBLE OPERATING SYSTEMS........................................................................ 153
E.2 COMPATIBLE PROCESSORS ..................................................................................... 153
E.3 COMPATIBLE MEMORY MODULES.......................................................................... 154
F HAZARDOUS MATERIALS DISCLOSURE........................................................ 155
F.1 HAZARDOUS MATERIALS DISCLOSURE TABLE FOR IPB PRODUCTS CERTIFIED AS