User guide

ManualsBrandsIEI Integration ManualsHardwarePXE-12S

PXE-12S-R10





1. J1 : Intel Bridge 41210 Use MCU read/write Pin

Pin DESCRIPTION

1 MCLR

+5V

GND

RB7/PGD

RB6/PGC

2. J2 & J3 : Intel Bridge 41210 SM-BUS Setting

3. J4 : Intel Bridge 41210 Initialization Register Setting

4. J5 : PCI-X_A1~PCI-X_A4 Frequency Setting

DESCRIPTION

1-2

Normal Operation

(default)

2-3

Test Purposes

DESCRIPTION

Open (High)

Initialization Register

Short (Low)

Normal response

(default)

Freq.

33 MHz Open Short

PCI

66 MHz

(Default)

Short

Open

PCI-X

66 MHz

(Default)

Short

Open

Jun. 06, 2008

Summary of content (6 pages)

PAGE 1
PXE-12S-R10 Jun. 06, 2008 1. J1 : Intel Bridge 41210 Use MCU read/write Pin Pin 1 2 3 4 5 DESCRIPTION MCLR +5V GND RB7/PGD RB6/PGC 1 2 3 4 5 2. J2 & J3 : Intel Bridge 41210 SM-BUS Setting 1 2 Pin 3 1-2 2-3 3. DESCRIPTION Normal Operation (default) Test Purposes J4 : Intel Bridge 41210 Initialization Register Setting 1 2 J4 Open (High) Short (Low) DESCRIPTION Initialization Register Normal response (default) 4. J5 : PCI-X_A1~PCI-X_A4 Frequency Setting Freq.
PAGE 2
5. J7 : PCI-X_B1 & PCI-X_B2 Frequency Setting Freq. 3 1 4 6. Pin 33 MHz 66 MHz (Default) 66 MHz (Default) 100 MHz PCI \ 2 PCI-X 3-4 Short Open Short Open Short Open Short VIO_J1 : PCI-X_A1 ~ PCI-X_A4 VIO Power Setting VIO_J2 : PCI-X_B1 & PCI-X_B2 VIO Power Setting PCI-X Slot +5V +3.3V DESCRIPTION 1-4 , 2-5 , 3-6 Short 7-4 , 8-5 , 9-6 Short (default) VIO = +5V 7 8 9 6.
PAGE 3
8. ATXCTL1 : Backplane to Mainboard Connector PIN NO. 1 2 3 DESCRIPTION GND PSON# 5VSB 9. PWRBTN : Power on Button PIN NO. 1 2 2 1 DESCRIPTION GND PWRBT# 10. RESET : Reset Button PIN NO. 1 2 2 1 DESCRIPTION GND SHB_RST# 11. PWRGD : Power Good Connector PIN NO. 1 2 2 1 DESCRIPTION GND PWRGD 12. SM-BUS : System Management BUS Connector 2 1 PIN NO. 1 2 DESCRIPTION SMDAT SMCLK 13. CN1 : PCIE X8 SDVO Control Signal 1 2 3 PIN NO.
PAGE 4
14. IOPWR : I/O Power Connector PIN NO. 1 3 5 7 9 11 13 15 17 19 19 DESCRIPTION PIN NO. GND 2 +12V 4 IPMB_DA 6 GND 8 IPMB_CL 10 +5V 12 SMDAT 14 5VSB 16 SMCLK 18 +3.3V 20 17 15 20 13 18 11 16 9 7 14 12 10 DESCRIPTION -12V GND 5VSB GND 5VSB PWRGD SHB_RST# GND PSON# PWRBT# 5 3 8 6 1 4 2 15. PCI routing table: PICMG1.3 Local PCI routing table : SIGNAL PIN No.
PAGE 5
15. Notice: a. Recommend to use 6mm width spacer to install b. Torsion must less than 6lb-inch c. The voltage settings of the green jumper keys of the PCI-X slots must be the same with the voltage settings of the VIO Power jumper (VIO_J1,VIO_J2). Incorrect usage may cause permanently damage to the backplane and CPU card.
PAGE 6
16.