Owner's manual

PXE-13S

13-Slot PICMG 1.3 PCIe to PCI Bridge Backplane

User Manual Ver. 5.0

1. USB1, USB2: External 4 Port USB Connectors From the Mainboard

2. FAN1, FAN2, FAN3, FAN4: Fan Connector

3. ATXCTL1: Backplane to Mainboard ATX Power ControlConnector

4. PWR2: This connector supports the AT-P10 power Connector

5. PWRBTN: Power On Button

Aug. 17, 2011

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■

●

DESCRIPTION

1 USBVCC 2 GND

3 DATA- 4 DATA+

5 DATA+ 6 DATA-

7 GND 8 USBVCC

DESCRIPTION

1 GND

2 +12V

3 NC

123

DESCRIPTION

1 GND

2 PSON#

3 5VSB

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■

●

PIN 1

DESCRIPTION +5V GND

DESCRIPTION

1 GND

2 PWRBT#

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Aug. 17, 2011 PXE-13S 13-Slot PICMG 1.3 PCIe to PCI Bridge Backplane User Manual Ver. 5.0 1. USB1, USB2: External 4 Port USB Connectors From the Mainboard 7 5 3 1 ● ● ● ● ● ● ■ ● 8 6 4 2 PIN 1 3 5 7 DESCRIPTION USBVCC DATADATA+ GND PIN 2 4 6 8 DESCRIPTION GND DATA+ DATAUSBVCC 2. FAN1, FAN2, FAN3, FAN4: Fan Connector 3 2 1 PIN 1 2 3 DESCRIPTION GND +12V NC 3. ATXCTL1: Backplane to Mainboard ATX Power ControlConnector 3 2 1 PIN 1 2 3 DESCRIPTION GND PSON# 5VSB 4.
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6. RESET : Reset Button Connector PIN 1 2 ● ■ 2 1 DESCRIPTION GND SHB_RST# 7. PWRGD: External Power Good Connector 2 1 PIN 1 2 ● ■ DESCRIPTION GND PWRGD 8. SM-BUS: External System Management BUS Connector 2 1 PIN 1 2 ● ■ DESCRIPTION SMDATA SMBCLK 9. CN1: PCIE X16 SDVO Control Signal Pin 1 2 PIN 1 2 3 3 ■ ● ● DESCRIPTION EXP_EN SDVO_CLK SDVO_DAT 10.
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11. J1: Write Protect Setup J1 are the EEPROM write protect pin of the PCI Express to PCI Bridge will allow EEPROM normal read/write operations when J1 held high. When the Jump is brought low and the EEPROM WPEN bit is “1”, all write operations to the status register are inhibited. 1 2 ■ ● J1 ON (Low) OFF (High) DESCRIPTION Write Inhibited Normal Read/Write (default) 12. PCI routing table: 13. Notice: a. Recommend to use 6mm width spacer to install b.
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14.