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PCB design board
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TLE 6208-3 G
Data Sheet
18
2007-09-12
Figure 8 DO
Enable and Disable Time
AET02181
CSN
t
fIN
rIN
t
DO
DO
10
ns
t
ENDO
ENDO
t
DISDO
t
t
DISDO
V
CC
to
Pullup
Pulldown
to GND
10 k
Ω
50%
50%
50%
0.7
V
CC
CC
V
0.2
_
<
10 k
Ω
1
...
...
16
17
18
19
20
21
...
22