Datasheet

TLE 6368 / SONIC
Data Sheet 17 Rev. 2.2, 2006-12-01
been read in at the DI line becomes the new control word. The DO output switches to
tristate status at this point, thereby releasing the DO bus circuit for other uses. For details
of the SPI timing please refer to Figures 10 to 13.
The SPI will be reset to default values given in the following table “write bit meaning” if
the RAM good flag of Q_LDO1 indicates a cold start (lower output voltage than 3.3V).
The reset will be active as long as the power on reset is present so during the reset delay
time at power up no SPI commands are accepted.
The register content of the SPI - including watchdog timings and reset delay timings - is
maintained if the RAM good flag of Q_LDO1 indicates a warm start (i.e. Q_LDO1 did not
decrease below 3.3V).
2.12.1 Write mode
The following tables show the bit assignment to the different control functions, how to
change settings with the right bit combination and also the default status at power up.
2.12.2 Write mode bit assignment
Figure 8 Write Bit assignment
Write Bit meaning
Function Bit Combination Default
Not assigned D1 X X
Tracker 1 to 6 - control:
turn on/off the individual trackers
D2
D3
D4
D5
D6
D7
0: OFF
1: ON
1
Power down:
send device to sleep
D8 0: SLEEP
1: NORMAL
1
WD_
OFF1
T6-
control
T5-
control
T4-
control
T6-
control
T2-
control
T1-
control
NOT
assigned
sleep
WD_
TRIG
WD_
OFF3
WD2WD1reset 2reset 1
WD_
OFF2
1 111111X 1 0100110
BIT
Default
Name
D 15D8 D9 D10 D11 D12 D13 D14D7DO D1 D2 D3 D4 D5 D6