Datasheet

www.irf.com 1
03/16/10
IRF6710S2TRPbF
IRF6710S2TR1PbF
DirectFET Power MOSFET 
Applicable DirectFET Outline and Substrate Outline 
Typical values (unless otherwise specified)
DirectFET ISOMETRIC
S1
l RoHS Compliant Containing No Lead and Halogen Free 
l Low Profile (<0.7 mm)
l Dual Sided Cooling Compatible 
l Ultra Low Package Inductance
l Optimized for High Frequency Switching 
l Ideal for CPU Core DC-DC Converters
l Optimized for Control FET Application
l Compatible with existing Surface Mount Techniques 
l 100% Rg tested
Description
The IRF6710S2TRPbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFET
TM
packaging to
achieve improved performance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The DirectFET package is
compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection
soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET pack-
age allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6710S2TRPbF has low gate resistance and low charge along with ultra low package inductance providing significant reduction in
switching losses. The reduced losses make this product ideal for high efficiency DC-DC converters that power the latest generation of
processors operating at higher frequencies. The IRF6710S2TRPbF has been optimized for the control FET socket of synchronous buck
operating from 12 volt bus converters.
Fig 1. Typical On-Resistance vs. Gate Voltage
Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage
 Click on this section to link to the appropriate technical paper.
 Click on this section to link to the DirectFET Website.
 Surface mounted on 1 in. square Cu board, steady state.
 T
C
measured with thermocouple mounted to top (Drain) of part.
 Repetitive rating; pulse width limited by max. junction temperature.
 Starting T
J
= 25°C, L = 0.49mH, R
G
= 25Ω, I
AS
= 10A.
Notes:
0 4 8 12162024
Q
G
Total Gate Charge (nC)
0
2
4
6
8
10
12
V
G
S
,
G
a
t
e
-
t
o
-
S
o
u
r
c
e
V
o
l
t
a
g
e
(
V
)
V
DS
= 20V
VDS= 13V
I
D
= 10A
Q
g tot
Q
gd
Q
gs2
Q
rr
Q
oss
V
gs(th)
8.8nC 3.0nC 1.3nC 8.0nC 4.4nC 1.8V
2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0
V
GS
, Gate-to-Source Voltage (V)
0
5
10
15
20
T
y
p
i
c
a
l
R
D
S
(
o
n
)
(
m
Ω
)
T
J
= 25°C
T
J
= 125°C
I
D
= 12A
Absolute Maximum Ratin
g
s
Parameter Units
V
DS
Drain-to-Source Voltage V
V
GS
Gate-to-Source Voltage
I
D
@ T
A
= 25°C
Continuous Drain Current, V
GS
@ 10V
I
D
@ T
A
= 70°C
Continuous Drain Current, V
GS
@ 10V
A
I
D
@ T
C
= 25°C
Continuous Drain Current, V
GS
@ 10V
I
DM
Pulsed Drain Current
E
AS
Single Pulse Avalanche Energy mJ
I
AR
Avalanche Current A
24
Max.
10
37
100
±20
25
12
10
V
DSS
V
GS
R
DS(on)
R
DS(on)
25V max ±20V max
4.5mΩ@ 10V 9.0mΩ@ 4.5V
S1
S2 SB M2 M4 L4 L6 L8
PD - 97124D