Datasheet

ManualsBrandsINFINEON TECHNOLOGIES ManualsFETsIRF7403, MOSFET N channel 8.5A 30V

HEXFET

Power MOSFET

PD - 9.1245B

8/25/97

l Generation V Technology

l Ultra Low On-Resistance

l N-Channel Mosfet

l Surface Mount

l Available in Tape & Reel

l Dynamic dv/dt Rating

l Fast Switching

Description

Fifth Generation HEXFETs from International Rectifier utilize advanced processing

techniques to achieve the lowest possible on-resistance per silicon area. This

benefit, combined with the fast switching speed and ruggedized device design that

HEXFET Power MOSFETs are well known for, provides the designer with an

extremely efficient device for use in a wide variety of applications.

The SO-8 has been modified through a customized leadframe for enhanced

thermal characteristics and multiple-die capability making it ideal in a variety of

power applications. With these improvements, multiple devices can be used in

an application with dramatically reduced board space. The package is designed

for vapor phase, infra red, or wave soldering techniques. Power dissipation of

greater than 0.8W is possible in a typical PCB mount application.

IRF7403

PRELIMINARY

Top View

SO-8

DSS

= 30V

DS(on)

= 0.022Ω

Parameter Max. Units

@ T

= 25°C 10 Sec. Pulsed Drain Current, V

@ 10V 9.7

@ T

= 25°C Continuous Drain Current, V

@ 10V 8.5

@ T

= 70°C Continuous Drain Current, V

@ 10V 5.4

Pulsed Drain Current  34

= 25°C Power Dissipation 2.5 W

Linear Derating Factor 0.02 W/°C

Gate-to-Source Voltage ±20 V

dv/dt Peak Diode Recovery dv/dt  5.0 V/ns

STG

Junction and Storage Temperature Range -55 to + 150 °C

Absolute Maximum Ratings

Thermal Resistance Ratings

Parameter Typ. Max. Units

θJA

Maximum Junction-to-Ambient ––– 50

°C/W

Summary of content (9 pages)

PAGE 1
PD - 9.1245B IRF7403 PRELIMINARY HEXFET® Power MOSFET l l l l l l l Generation V Technology Ultra Low On-Resistance N-Channel Mosfet Surface Mount Available in Tape & Reel Dynamic dv/dt Rating Fast Switching A A D S 1 8 S 2 7 D S 3 6 D G 4 5 D VDSS = 30V RDS(on) = 0.022Ω T op V iew Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area.
PAGE 2
IRF7403 Electrical Characteristics @ TJ = 25°C (unless otherwise specified) ∆V(BR)DSS/∆TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Min. 30 ––– ––– ––– 1.0 8.4 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– 0.
PAGE 3
IRF7403 1000 1000 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTT OM 4.5V 100 4.5V 10 20 µs P UL SE W ID TH TJ = 25°C 1 0.01 VGS 15V 10V 8. 0V 7. 0V 6. 0V 5. 5V 5. 0V BOTT OM 4.5V TOP I , D ra in -to -S o u rce C u rre n t (A ) D I , D ra in -to -S o u rce C u rre n t (A ) D TOP 0.1 1 10 A 100 4.5 V 10 20µ s PU L SE W ID TH TJ = 1 50 °C 1 0.01 100 0.
PAGE 4
IRF7403 V GS C iss C rss C oss C , C a p a c ita n c e (p F ) 2000 = = = = 20 0V, f = 1M H z C gs + C gd , C ds SH O R TED C gd C ds + C gd V G S , G a te -to -S o u rc e V o lta g e (V ) 2400 16 C i ss 1600 I D = 4.0A VDS = 2 4V 12 C o ss 1200 800 C rs s 400 0 10 4 FO R TES T C IR CU IT SEE FIG U RE 12 0 A 1 8 100 0 10 V D S , Drain-to-Source V oltage (V) 30 40 50 60 Q G , Total Gate Charge (nC ) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6.
PAGE 5
IRF7403 VDS VGS 10.0 RD D.U.T. RG + - VDD I D , Drain Current (A) 8.0 10 V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 6.0 Fig 10a. Switching Time Test Circuit 4.0 VDS 90% 2.0 10% VGS 0.0 25 50 75 100 T C , Case Temperature 125 150 ( ° C) td(on) Fig 9. Maximum Drain Current Vs. Ambient Temperature tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJA ) 100 D = 0.50 10 0.20 0.10 0.05 PDM 0.02 1 0.01 t1 t2 SINGLE PULSE (THERMAL RESPONSE) 0.1 0.0001 0.
PAGE 6
IRF7403 Current Regulator Same Type as D.U.T. 50KΩ QG .2µF 12V .3µF 10 V QGS D.U.T. QGD + V - DS VGS VG 3mA IG Charge Fig 12a. Basic Gate Charge Waveform ID Current Sampling Resistors Fig 12b.
PAGE 7
IRF7403 Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + - - + ** • dv/dt controlled by RG • I SD controlled by Duty Factor "D" • D.U.T. - Device Under Test RG VGS* + - * VDD * Reverse Polarity for P-Channel ** Use P-Channel Driver for P-Channel Measurements Driver Gate Drive P.W. Period D= P.W. Period [VGS=10V ] *** D.U.T.
PAGE 8
IRF7403 Package Outline SO-8 Outline Dimensions are shown in millimeters (inches) INCHES DIM D -B- 5 8 7 1 2 6 5 3 0.25 (.010) 4 e 6X M A M MIN A .0532 .0688 1.35 1.75 A1 .0040 .0098 0.10 0.25 B .014 .018 0.36 0.46 C .0075 .0098 0.19 0.25 D .189 .196 4.80 4.98 E .150 .157 3.81 3.99 e K x 45° e1 e1 θ A -C- 0.10 (.004) L 8X A1 B 8X 0.25 (.010) MAX 5 H E -A- 6 C 8X .050 BASIC 1.27 BASIC .025 BASIC 0.635 BASIC .2284 .2440 5.80 K .011 .
PAGE 9
IRF7403 Tape & Reel Information SO-8 Dimensions are shown in millimeters (inches) 2 .0 5 (. 08 0) 1 .9 5 (. 07 7) T E R M IN AT IO N NU MB E R 1 1 .8 5 (. 07 2) 4 .1 0 (. 16 1) 1 .6 5 (. 06 5) 3 .9 0 (. 15 4) 1 .60 (. 06 2) 1 .50 (. 05 9) 0 .35 (.0 13 ) 0 .25 (.0 10 ) 5.5 5 (. 21 8) 5.4 5 (. 21 5) 1 F E E D D IR EC T IO N 5.3 0 (. 20 8) 5.1 0 (. 20 1) 12 .30 (.4 8 4) 11 .70 (.4 6 1) 2.6 0 (.1 02 ) 1.5 0 (.0 59 ) 8.1 0 (.31 8) 7.9 0 (.31 1) 2 .20 (.0 8 6) 2 .00 (.0 7 9) 6 .5 0 (.25 5) 6 .3 0 (.