Datasheet

ManualsBrandsINFINEON TECHNOLOGIES ManualsFETsIRF9Z24NPBF, MOSFET P channel 12 A -55V

IRF9Z24N

HEXFET

Power MOSFET

PD -9.1484B

Fifth Generation HEXFETs from International Rectifier

utilize advanced processing techniques to achieve

extremely low on-resistance per silicon area. This

benefit, combined with the fast switching speed and

ruggedized device design that HEXFET Power

MOSFETs are well known for, provides the designer

with an extremely efficient and reliable device for use

in a wide variety of applications.

The TO-220 package is universally preferred for all

commercial-industrial applications at power dissipation

levels to approximately 50 watts. The low thermal

resistance and low package cost of the TO-220

contribute to its wide acceptance throughout the

industry.

Parameter Max. Units

@ T

= 25°C Continuous Drain Current, V

@ -10V -12

@ T

= 100°C Continuous Drain Current, V

@ -10V -8.5 A

Pulsed Drain Current  -48

= 25°C Power Dissipation 45 W

Linear Derating Factor 0.30 W/°C

Gate-to-Source Voltage ± 20 V

Single Pulse Avalanche Energy 96 mJ

Avalanche Current -7.2 A

Repetitive Avalanche Energy 4.5 mJ

dv/dt Peak Diode Recovery dv/dt  -5.0 V/ns

Operating Junction and -55 to + 175

STG

Storage Temperature Range

Soldering Temperature, for 10 seconds 300 (1.6mm from case )

°C

Mounting torque, 6-32 or M3 screw 10 lbf•in (1.1N•m)

Absolute Maximum Ratings

Parameter Typ. Max. Units

θJC

Junction-to-Case ––– 3.3

θCS

Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W

θJA

Junction-to-Ambient ––– 62

Thermal Resistance

DSS

= -55V

DS(on)

= 0.175Ω

= -12A

TO-220AB

l Advanced Process Technology

l Dynamic dv/dt Rating

l 175°C Operating Temperature

l Fast Switching

l P-Channel

l Fully Avalanche Rated

Description

8/27/97

Summary of content (8 pages)

PAGE 1
PD -9.1484B IRF9Z24N HEXFET® Power MOSFET Advanced Process Technology Dynamic dv/dt Rating l 175°C Operating Temperature l Fast Switching l P-Channel l Fully Avalanche Rated Description l D l VDSS = -55V RDS(on) = 0.175Ω G ID = -12A S Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area.
PAGE 2
IRF9Z24N Electrical Characteristics @ TJ = 25°C (unless otherwise specified) RDS(on) VGS(th) gfs Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Qg Q gs Q gd t d(on) tr t d(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Min.
PAGE 3
IRF9Z24N 100 VGS - 15V - 10V - 8.0V - 7.0V - 6.0V - 5.5V - 5.0V BOTT OM - 4. 5V 10 1 10 -4.5 V -4.5 V A 1 0.1 VGS - 15V - 10V - 8.0V - 7.0V - 6.0V - 5.5V - 5.0V BOTT OM - 4. 5V TOP -ID , D ra in -to -S o u rc e C u rre n t (A ) -ID , D ra in -to -S o u rce C u rre n t (A ) 100 2 0µ s PU LS E W ID TH TJ c = 2 5°C TOP 10 1 100 0.1 -VD S , Drain-to-Source Voltage (V) 2.
PAGE 4
IRF9Z24N 20 V GS C is s C rs s C os s C , C a p a c ita n c e (p F ) 600 500 C is s 400 C os s = = = = 0V , f = 1MH z C gs + C g d , Cds SH OR TED Cgd C ds + C gd -V G S , G a te -to -S o u rc e V o lta g e (V ) 700 300 C rs s 200 100 0 10 V DS = -4 4V V DS = -2 8V 16 12 8 4 FO R TEST C IR C U IT SEE F IGU R E 1 3 0 A 1 I D = -7.2 A 0 100 V D S , Drain-to-Source V oltage (V) 10 15 20 A 25 Q G , Total Gate Charge (nC) Fig 6. Typical Gate Charge Vs.
PAGE 5
IRF9Z24N 12 RD VDS -ID , D ra i n C u rre n t (A m p s ) VGS 9 D.U.T. RG + VDD -10V 6 Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % Fig 10a. Switching Time Test Circuit 3 td(on) tr t d(off) tf VGS A 0 25 50 75 100 125 150 10% 175 TC , C ase T emperature (°C) 90% Fig 9. Maximum Drain Current Vs. Case Temperature VDS Fig 10b. Switching Time Waveforms T herm al R esponse (Z th J C ) 10 D = 0 .5 0 1 0 .2 0 0 .1 0 0 .0 5 0.1 PDM 0 .0 2 0 .
PAGE 6
IRF9Z24N D .U .T RG IA S - 20V tp VD D A D R IV E R 0 .0 1 Ω 15V Fig 12a. Unclamped Inductive Test Circuit E A S , S in g le P u ls e A va la n c h e E n e rg y (m J) 250 L VDS TO P B OTTO M 200 150 100 50 0 A 25 I AS ID -2.9A -5.1 A -7.2 A 50 75 100 125 150 Starting T J , Junction Temperature (°C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current tp V(BR)DSS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ QG 12V .3µF -10V QGS .
PAGE 7
IRF9Z24N Peak Diode Recovery dv/dt Test Circuit + D.U.T* Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + - - + • dv/dt controlled by RG • I SD controlled by Duty Factor "D" • D.U.T. - Device Under Test RG VGS * + - VDD Reverse Polarity of D.U.T for P-Channel Driver Gate Drive P.W. Period D= P.W. Period [ ] *** VGS=10V D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T.
PAGE 8
IRF9Z24N Package Outline TO-220AB Outline Dimensions are shown in millimeters (inches) 2 . 8 7 ( .1 1 3 ) 2 . 6 2 ( .1 0 3 ) 1 0 . 5 4 (. 4 1 5 ) 1 0 . 2 9 (. 4 0 5 ) -B - 3 . 7 8 (. 1 4 9 ) 3 . 5 4 (. 1 3 9 ) 4 . 6 9 ( .1 8 5 ) 4 . 2 0 ( .1 6 5 ) -A - 1 .3 2 (. 0 5 2 ) 1 .2 2 (. 0 4 8 ) 6 . 4 7 (. 2 5 5 ) 6 . 1 0 (. 2 4 0 ) 4 1 5 . 2 4 ( .6 0 0 ) 1 4 . 8 4 ( .5 8 4 ) 1 . 1 5 ( .0 4 5 ) M IN 1 2 1 4 . 0 9 (.5 5 5 ) 1 3 . 4 7 (.5 3 0 ) 3X 1 .4 0 (. 0 5 5 ) 1 .1 5 (.