Datasheet

ManualsBrandsINFINEON TECHNOLOGIES ManualsFETsIRL630PBF, MOSFET N channel 200V

IRL630

HEXFET

Power MOSFET

PD -9.1255

Revision 0

DSS

= 200V

DS(on)

= 0.40Ω

= 9.0A

Absolute Maximum Ratings

Thermal Resistance

Parameter Max. Units

@ T

= 25°C Continuous Drain Current, V

@ 5.0V 9.0

@ T

= 100°C Continuous Drain Current, V

@ 5.0V 5.7 A

Pulsed Drain Current 36

= 25°C Power Dissipation 74 W

Linear Derating Factor 0.59 W/°C

Gate-to-Source Voltage ±10 V

Single Pulse Avalanche Energy 250 mJ

Avalanche Current 9.0 A

Repetitive Avalanche Energy 7.4 mJ

dv/dt Peak Diode Recovery dv/dt 5.0 V/ns

Operating Junction and -55 to + 150

STG

Storage Temperature Range °C

Soldering Temperature, for 10 seconds 300 (1.6mm from case)

Mounting torque, 6-32 or M3 screw. 10 lbf•in (1.1N•m)

Parameter Min. Typ. Max. Units

θJC

Junction-to-Case –––– –––– 1.7

θCS

Case-to-Sink, Flat, Greased Surface –––– 0.50 –––– °C/W

θJA

Junction-to-Ambient –––– –––– 62

Dynamic dv/dt Rating

Repetitive Avalanche Rated

Logic-Level Gate Drive

DS(ON)

Specified at V

= 4V & 5V

150°C Operating Temperature

Fast Switching

Ease of paralleling

Third Generation HEXFETs from International Rectifier provide the designer

with the best combination of fast switching, ruggedized device design, low on-

resistance and cost-effectiveness.

The TO-220 package is universally preferred for all commercial-industrial

applications at power dissipation levels to approximately 50 watts. The low

thermal resistance and low package cost of the TO-220 contribute to its wide

acceptance throughout the industry.

Description

Summary of content (8 pages)

PAGE 1
PD -9.1255 IRL630 HEXFET ® Power MOSFET Dynamic dv/dt Rating Repetitive Avalanche Rated Logic-Level Gate Drive RDS(ON) Specified at V GS = 4V & 5V 150°C Operating Temperature Fast Switching Ease of paralleling VDSS = 200V RDS(on) = 0.40 Ω ID = 9.0A Description Third Generation HEXFETs from International Rectifier provide the designer with the best combination of fast switching, ruggedized device design, low onresistance and cost-effectiveness.
PAGE 2
IRL630 Electrical Characteristics @ TJ = 25°C (unless otherwise specified) ∆V(BR)DSS/∆TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp.
PAGE 3
IRL630 100 VGS 7.50V 5.00V 4.00V 3.50V 3.00V 2.75V 2.50V BOTTOM 2.25V I , Drain-to-Source Current (A) D I , Drain-to-Source Current (A) D TOP 10 1 2.25V 20µs PULSE WIDTH Tc = 25°C 0.1 0.1 1 10 100 A VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics, TC = 25oC Fig 2. Typical Output Characteristics, TC = 150oC R DS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) 100 10 TJ = 150°C 1 TJ = 25°C 0.1 VDS = 50V 20µs PULSE WIDTH 0.
PAGE 4
IRL630 10 V GS = 0V, f = 1MHz Ciss = Cgs + C gd , Cds SHORTED Crss = C gd Coss = Cds + C gd V GS , Gate-to-Source Voltage (V) C, Capacitance (pF) 2000 1500 Ciss 1000 Coss 500 Crss A 0 1 10 I D = 9.0A VDS = 160V VDS = 100V VDS = 40V 8 6 4 2 FOR TEST CIRCUIT SEE FIGURE 13 0 100 0 VDS , Drain-to-Source Voltage (V) 20 30 40 A Q G , Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs.
PAGE 5
IRL630 RD VDS VGS 10 D.U.T. RG ID, Drain Current (Amps) VDD 8 5.0 V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 6 Fig 10a. Switching Time Test Circuit 4 2 0 25 50 75 100 125 A 150 TC , Case Temperature (°C) Fig 9. Maximum Drain Current Vs. Case Temperature Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 1 D = 0.50 0.20 0.10 0.1 PDM 0.05 t 0.02 0.01 t 2 N o te s : 1 . D u ty fa c to r D = t / t 1 2 SINGLE PULSE (THERMAL RESPONSE) 0.01 0.00001 1 2 .
PAGE 6
5.0V Fig 12a. Unclamped Inductive Test Circuit EAS , Single Pulse Avalanche Energy (mJ) IRL630 600 ID 9.0A 5.7A BOTTOM 4.0A TOP 500 400 300 200 100 0 VDD = 50V 25 50 A 75 100 125 150 Starting TJ , Juntion Temperature (°C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current Fig 12b. Unclamped Inductive Waveforms 5.0V Fig 13a. Basic Gate Charge Waveform Fig 13b.
PAGE 7
IRL630 Peak Diode Recovery dv/dt Test Circuit Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer D.U.T RG • • • • dv/dt controlled by R G Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test VDD * * VGS = 5V for Logic Level Devices Fig 14.
PAGE 8
IRL630 Package Outline TO-220AB Outline 2.87 (.113) 2.62 (.103) 10.54 (.415) 10.29 (.405) 3.78 (.149) 3.54 (.139) -A- 4 -B- 4.69 (.185) 4.20 (.165) 1.32 (.052) 1.22 (.048) 6.47 (.255) 6.10 (.240) 15.24 (.600) 14.84 (.584) 1.15 (.045) MIN 1 2 LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN 3 3X 14.09 (.555) 13.47 (.530) 4.06 (.160) 3.55 (.140) 3X 3X 1.40 (.055) 1.15 (.045) NOTES: 1 DIMENSIONS & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH.