Datasheet

ManualsBrandsINFINEON TECHNOLOGIES ManualsFETsIRLI540NPBF, MOSFET N channel 23A voltage:100V

IRLI540N

PRELIMINARY

HEXFET

Power MOSFET

PD - 9.1497A

DSS

= 100V

DS(on)

= 0.044Ω

= 23A

l Logic-Level Gate Drive

l Advanced Process Technology

l Isolated Package

l High Voltage Isolation = 2.5KVRMS 

l Sink to Lead Creepage Dist. = 4.8mm

l Fully Avalanche Rated

TO-220 FULLPAK

3/16/98

Parameter Typ. Max. Units

θJC

Junction-to-Case ––– 2.8

θJA

Junction-to-Ambient ––– 65

Thermal Resistance

Parameter Max. Units

@ T

= 25°C Continuous Drain Current, V

@ 10V 23

@ T

= 100°C Continuous Drain Current, V

@ 10V 16 A

Pulsed Drain Current  120

= 25°C Power Dissipation 54 W

Linear Derating Factor 0.36 W/°C

Gate-to-Source Voltage ± 16 V

Single Pulse Avalanche Energy 310 mJ

Avalanche Current 18 A

Repetitive Avalanche Energy 5.4 mJ

dv/dt Peak Diode Recovery dv/dt  5.0 V/ns

Operating Junction and -55 to + 175

STG

Storage Temperature Range

Soldering Temperature, for 10 seconds 300 (1.6mm from case )

°C

Mounting torque, 6-32 or M3 screw 10 lbf•in (1.1N•m)

Absolute Maximum Ratings

°C/W

Description

Fifth Generation HEXFETs from International Rectifier

utilize advanced processing techniques to achieve

extremely low on-resistance per silicon area. This

benefit, combined with the fast switching speed and

ruggedized device design that HEXFET Power

MOSFETs are well known for, provides the designer

with an extremely efficient and reliable device for use

in a wide variety of applications.

The TO-220 Fullpak eliminates the need for additional

insulating hardware in commercial-industrial

applications. The moulding compound used provides

a high isolation capability and a low thermal resistance

between the tab and external heatsink. This isolation

is equivalent to using a 100 micron mica barrier with

standard TO-220 product. The Fullpak is mounted to

a heatsink using a single clip or by a single screw

fixing.

Summary of content (8 pages)

PAGE 1
PD - 9.1497A IRLI540N PRELIMINARY HEXFET® Power MOSFET Logic-Level Gate Drive Advanced Process Technology l Isolated Package l High Voltage Isolation = 2.5KVRMS l Sink to Lead Creepage Dist. = 4.8mm l Fully Avalanche Rated Description l D l VDSS = 100V RDS(on) = 0.044Ω G ID = 23A S Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area.
PAGE 2
IRLI540N Electrical Characteristics @ TJ = 25°C (unless otherwise specified) ∆V(BR)DSS/∆TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp.
PAGE 3
IRLI540N 1000 1000 VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V TOP ID , Drain-to-Source Current (A) ID , Drain-to-Source Current (A) TOP 100 10 2.5V 20µs PULSE WIDTH T J = 25°C 1 0.1 1 10 A 100 10 2.5V 20µs PULSE WIDTH T J = 175°C 1 100 0.1 1 V D S , Drain-to-Source Voltage (V) Fig 2. Typical Output Characteristics 3.
PAGE 4
IRLI540N 15 3000 V G S , Gate-to-Source Voltage (V) V G S = 0V, f = 1MHz C iss = C gs+ C gd , C SHORTED ds C rss = C gd C oss = C ds+ C gd C, Capacitance (pF) 2000 C oss C rss 0 10 9 6 3 FOR TEST CIRCUIT SEE FIGURE 13 0 A 1 V D S = 80V V D S = 50V V D S = 20V 12 C iss 1000 I D = 18A 0 100 40 60 80 A 100 Q G , Total Gate Charge (nC) V D S , Drain-to-Source Voltage (V) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs.
PAGE 5
IRLI540N 25 RD VDS VGS I D , Drain Current (A) 20 D.U.T. RG + -VDD 15 5.0V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 10 Fig 10a. Switching Time Test Circuit 5 VDS 90% 0 25 50 75 100 125 150 175 TC , Case Temperature ( ° C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 D = 0.50 1 0.20 0.10 0.05 0.1 0.01 0.00001 P DM 0.02 0.01 t1 t2 SINGLE PULSE (THERMAL RESPONSE) Notes: 1.
PAGE 6
L VD S D .U .T RG IA S 10V tp D R IV E R + - VD D A 0.0 1 Ω Fig 12a. Unclamped Inductive Test Circuit 800 TOP BOTTOM ID 7.3A 13A 18A 600 400 200 E AS , 1 5V Single Pulse Avalanche Energy (mJ) IRLI540N A 0 25 V (B R )D SS tp 50 75 100 125 150 Starting T J , Junction Temperature (°C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current IAS Current Regulator Same Type as D.U.T. Fig 12b. Unclamped Inductive Waveforms 50KΩ 12V .2µF QG .3µF 5.0 V QGS D.U.T.
PAGE 7
IRLI540N Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + - - + • • • • RG dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Driver Gate Drive D= Period P.W. + - VDD P.W. Period VGS=10V D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T.
PAGE 8
IRLI540N Package Outline TO-220 Fullpak Outline Dimensions are shown in millimeters (inches) 1 0 .6 0 (.4 1 7 ) 1 0 .4 0 (.4 0 9 ) ø 3 .4 0 (.1 3 3 ) 3 .1 0 (.1 2 3 ) 4 .8 0 ( .1 89 ) 4 .6 0 ( .1 81 ) -A 3 .7 0 (.14 5 ) 3 .2 0 (.12 6 ) 1 6 .0 0 (.6 3 0 ) 1 5 .8 0 (.6 2 2 ) 2 .80 (.1 10 ) 2 .60 (.1 02 ) L E A D A S S IG N M E N T S 1 - G A TE 2 - D R A IN 3 - S O U RC E 7 .1 0 (.2 8 0 ) 6 .7 0 (.2 6 3 ) 1 .1 5 (.0 4 5) M IN. NO T E S : 1 D IME N S IO N ING & T O L E R A N C ING P E R A N S I Y 1 4 .