ISOFACE™ ISO1H812G Galvanic Isolated 8 Channel High-Side Switch Datasheet Revision 2.
Edition 2013-05-16 Published by Infineon Technologies AG 81726 Munich, Germany © 2013 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics.
ISOFACE™ ISO1H812G Revision History Page or Item Subjects (major changes since previous revision) Revision 2.5, 2013-05-16 Page 13 Page 13, Table 4.1 Extended operating temperature footnote removed Revision 2.4 Page 13 Page 13, Table 4.1 Extended operating temperature added Revision 2.3 Page 14 Page 14, Table 4.3 updated Page 18 Page 18 Table 4.8 updated Revision 2.2 Page 5 Page 5, Figure 1 updated Revision 2.1 all Data for parallel channels and UL approval added Revision 2.
ISOFACE™ ISO1H812G Coreless Transformer Isolated Digital Output 8 Channel 0.625 A High-Side Switch Product Highlights • • • • Coreless transformer isolated data interface Galvanic isolation 8 High-side output switches 0.625A µC compatible 8-bit serial peripheral Features Typical Application • • • • • • • • • • • • • • • • • • • • • • • Interface CMOS 3.
ISOFACE™ ISO1H812G Pin Configuration and Functionality 1 Pin Configuration and Functionality 1.1 Pin Configuration Vbb Pin Symbol 1 N.C. Not connected 2 VCC Positive 3.3/5V logic supply 3 DIS Output disable 4 CS Chip select 5 SCLK Serial Clock 6 SI 7 N.C. Not connected 8 N.C. Not connected 9 N.C. Not connected 10 N.C. Not connected 11 N.C. Not connected 12 N.C. Not connected 13 SO Serial Data Output 14 DIAG 15 GNDCC 16 N.C. Not connected 17 N.C.
ISOFACE™ ISO1H812G Pin Configuration and Functionality 1.2 Pin Functionality GNDCC (Ground for VCC domain) This pin acts as the ground reference for the input interface that is supplied by VCC. VCC (Positive 3.3/5V logic supply) The VCC supplies the input interface that is galvanically isolated from the output driver stage. The input interface can be supplied with 5V. GNDbb (Output driver ground domain) This pin acts as the ground reference for the output driver that is supplied by Vbb.
Datasheet 7 DIAG SO SI SCLK CS ISO1H812G Serial Input Interface VCC 100µA High-side Channel 7 Logic Charge Pump Level shifter Rectifier Charge Pump Level Shifter Rectifier Common Diagnostic Output High-side Channel 0 Logic to Logic Channel 1 6 Overvoltage Protection Temperature Sensor Overload Protection Current Limitation Limitation of Unclamped Inductive Load Gate Protection Vbb Channel 1 ...
ISOFACE™ ISO1H812G Functional Description 3 Functional Description 3.1 Introduction 3.3.2 The ISOface ISO1H812G includes 8 high-side power switches that are controlled by means of the integrated µC compatible SPI interface. The outputs OUT0...OUT7 are controlled by the data of the serial input SI. The IC can replace 8 optocouplers and the 8 high-side switches in conventional I/O-Applications as a galvanic isolation is implemented by means of the integrated coreless transformer technology.
ISOFACE™ ISO1H812G Functional Description 3.3.3 Power Transistor Overcurrent Protection IN The outputs are provided with a current limitation that enters a repetitive switched mode after an initial peak current has been exceeded. The initial peak short circuit current limit is set to IL(SCp) at Tj = 125°C. During the repetitive mode short circuit current limit is set to IL(SCr).
ISOFACE™ ISO1H812G Functional Description 3.5 Serial Interface SI - Serial input. Serial data bits are shifted in at this pin, the most significant bit first. SI information is read in on the rising edge of the SCLK. Input data is latched in the shift register and then transferred to the control buffer of the output stages. The ISO1H812G contains a serial interface that can be directly controlled by the microcontroller output ports. 3.5.1 SPI Signal Description SO - Serial output.
ISOFACE™ ISO1H812G Functional Description 3.5.2.2 Daisy-chain Configuration 3.6 The connection of different ICs and a µC as shown in Fig. 11 is called a daisy-chain. For this type of bustopology only one SPI interface of the µC for two or more ICs is needed. All ICs share the same clock and chip select port of the SPI master. That is all ICs are active and addressed simultaneously. The data out of the µC is connected to the SI of the first IC in the line.
ISOFACE™ ISO1H812G Functional Description 3.7 Serial Interface Timing Chipselect active CS SCLK n+7 SI SO Figure 11 n+5 n+4 n+3 n+2 n+1 n n-1 n-2 n-3 n-4 n-5 n-6 n-7 Serial interface tp(SCLK) tCSS tCSH ≈ CS n n+6 tSCLKH tSU Figure 12 tSCLKF tHD MSB In ≈ ≈ ≈ tSCLKL SCLK SI tCSD tSCLKR LSB In Serial input timing diagram ≈≈ CS SCLK tSODIS SO MSB Out Figure 13 Serial output timing diagram Datasheet ≈ ≈ tVALID 12 LSB Out Revision 2.
ISOFACE™ ISO1H812G Electrical Characteristics 4 Electrical Characteristics Note: All voltages at pins 2to 14 are measured with respect to ground GNDCC (pin 15). All voltages at pin 20 to pin 36 and TAB are measured with respect to ground GNDbb (pin 19). The voltage levels are valid if other ratings are not violated. The two voltage domains VCC ,GNDCC and Vbb ,GNDbb are internally galvanic isolated. 4.
ISOFACE™ ISO1H812G Electrical Characteristics 4) VLoaddump is setup without the DUT connected to the generator per ISO7637-1 and DIN40839 4.2 Thermal Characteristics Parameter Symbol at Tj = -25 ... 125°C, Vbb=15...30V, VCC= 3.0...5.5V, unless otherwise specified Thermal resistance junction - case RthJC Thermal resistance @ min. footprint Thermal resistance @ 6cm² cooling area Rth(JA) 1) Rth(JA) Limit Values Unit Test Condition min. typ. max. ------- ------- 1.
ISOFACE™ ISO1H812G Electrical Characteristics 4.4 Operating Parameters Parameter at Tj = -25 ... 125°C, Vbb=15...30V, VCC= 3.0...5.5V, unless otherwise specified Symbol Common mode transient immunity1) Magnetic field immunity1) Voltage domain Vbb (Output interface) Limit Values Unit min. typ. max.
ISOFACE™ ISO1H812G Electrical Characteristics 4.5 Output Protection Functions Parameter1) Symbol at Tj = -25 ... 125°C, Vbb=15...30V, VCC=3.0...5.5V, unless otherwise specified Limit Values min. typ. Unit Test Condition max. Initial peak short circuit current limit, each channel: IL(SCp) Tj = -25°C, Vbb = 30V, tm = 700µs ----1.9 Tj = 25°C --1.4 --0.
ISOFACE™ ISO1H812G Electrical Characteristics 4.7 Input Interface Parameter Symbol at Tj = -25 ... 125°C, Vbb=15...30V, VCC= 3.0...5.5V, unless otherwise specified Limit Values Unit Test Condition min. typ. max. Input low state voltage (SI, DIS, CS, SCLK) VIL -0.3 --- 0.3 x VCC Input high state voltage (SI, DIS, CS, SCLK) VIH 0.7 x VCC --- VCC+ 0.3 Input voltage hysteresis (SI, DIS, CS, SCLK) VIHys Output low state voltage (SO) VOL -0.3 --- 0.
ISOFACE™ ISO1H812G Electrical Characteristics 4.8 SPI Timing Parameter Symbol at Tj = -25 ... 125°C, Vbb=15...30V, VCC= 3.0...5.5V, unless otherwise specified Limit Values Unit Test Condition min. typ. max.
ISOFACE™ ISO1H812G Electrical Characteristics 4.10 Isolation and Safety-Related Specification Parameter Value Unit Conditions Rated dielectric isolation voltage VISO 500 VAC 1 - minute duration1) Short term temporary overvoltage 1250 V 5s acc. DIN EN60664-1 Minimum external air gap (clearance) 2.6 mm shortest distance through air. Minimum external tracking (creepage) 2.6 mm shortest distance path along body. Minimum Internal Gap 0.
ISOFACE™ ISO1H812G Electrical Characteristics Datasheet 20 Revision 2.
ISOFACE™ ISO1H812G Electrical Characteristics Datasheet 21 Revision 2.
ISOFACE™ ISO1H812G Package Outlines Package Outlines 0.65 0.25 +0.13 15.74 ±0.1 (Heatslug) +0.07 -0.02 B 2.8 6.3 0.1 C (Mold) 5˚ ±3˚ 0.25 0 +0.1 1.1 ±0.1 11 ±0.15 1) 1.3 (Plastic Dual Small Outline Package) 3.25 ±0.1 PG-DSO-36 3.5 MAX. 5 Heatslug 0.95 ±0.15 36x 0.25 M A B C 14.2 ±0.3 0.25 B 19 19 1 18 10 36 5.9 ±0.1 (Metal) 36 3.2 ±0.1 (Metal) Bottom View Index Marking 1 x 45˚ 15.9 ±0.1 1) (Mold) 1) Figure 14 Datasheet A 13.7 -0.
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